设备树学习之（五）watchdog

开发板：tiny4412SDK + S702 + 4GB Flash

要移植的内核版本：Linux-4.4.0 （支持device tree）

u-boot版本：友善之臂自带的 U-Boot 2010.12

busybox版本：busybox 1.25

目标：

学习设备树中普通中断的表示方法。

设备树参考：

watchdog: watchdog@10060000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x10060000 0x100>;
interrupts = <0 43 0>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
status = "disabled";
};

参考 arm,gic.txt

ARM SMP cores are often associated with a GIC, providing per processor
interrupts (PPI), shared processor interrupts (SPI) and software
generated interrupts (SGI).

Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
Secondary GICs are cascaded into the upward interrupt controller and do not
have PPIs or SGIs.

Main node required properties:

- compatible : should be one of:
"arm,arm1176jzf-devchip-gic"
"arm,arm11mp-gic"
"arm,cortex-a15-gic"
"arm,cortex-a7-gic"
"arm,cortex-a9-gic"
"arm,gic-400"
"arm,pl390"
"brcm,brahma-b15-gic"
"qcom,msm-8660-qgic"
"qcom,msm-qgic2"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source.  The type shall be a <u32> and the value shall be 3.

The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI interrupts.
The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987].  PPI interrupts are in the range [0-15].
The 3rd cell is the flags, encoded as follows:
bits[3:0] trigger type and level flags.
1 = low-to-high edge triggered
2 = high-to-low edge triggered (invalid for SPIs)
4 = active high level-sensitive
8 = active low level-sensitive (invalid for SPIs).
bits[15:8] PPI interrupt cpu mask.  Each bit corresponds to each of
the 8 possible cpus attached to the GIC.  A bit set to '1' indicated
the interrupt is wired to that CPU.  Only valid for PPI interrupts.
Also note that the configurability of PPI interrupts is IMPLEMENTATION
DEFINED and as such not guaranteed to be present (most SoC available
in 2014 seem to ignore the setting of this flag and use the hardware
default value).

interrupts = <0 43 0>;

0 flags:

shared processor interrupts (SPI) // 共享中断

providing per processor interrupts (PPI) // 每个处理器拥有独立中断

43 中断号：



0 触发方式：

1 = low-to-high edge triggered

2 = high-to-low edge triggered (invalid for SPIs)

4 = active high level-sensitive

8 = active low level-sensitive (invalid for SPIs).

这里设备树中虽然包含了中断资源，但是只是演示一下，代码中其实并没有用到，看门狗定时器时间到达时可以选择复位或者中断，这里采用的是复位。此外，在 4412 中看门狗复位还需要设置芯片手册中第八章的相关寄存器。具体，请参考代码。

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/cdev.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/fs.h>
#include <asm/uaccess.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/export.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/time.h>

/*
PCLK 时钟频率 100M
1/(100M / 100 / 128)
128us
*/

#define  MAGIC_NUMBER    'k'
#define  WTD_ON     _IO(MAGIC_NUMBER    ,0)
#define  WTD_OFF    _IO(MAGIC_NUMBER    ,1)
#define  WTD_FEED   _IO(MAGIC_NUMBER    ,2)
#define  WTD_READ   _IO(MAGIC_NUMBER    ,3)

struct WTD_BASE
{
unsigned int wtcon;     // 0
unsigned int wtdat;     // 4
unsigned int wtcnt;     // 8
unsigned int wtclrint;  // c
};

int                         major;
struct      cdev            wtd_cdev;
struct      class           *cls;
volatile    unsigned long   *mask_wtd_reset;
struct wtddev
{
struct      clk             *base_clk;
volatile    struct WTD_BASE *wtd_base;
};

static struct wtddev wtd;

static void wtd_on(unsigned long arg)
{
int ret;
unsigned int buf;
unsigned int wtcon;
printk("%s\n", __func__);
ret = copy_from_user(&buf, (const void __user *)arg, 4);

if (ret < 0)
{
printk("%s copy_from_user error\n", __func__);
}

wtcon = wtd.wtd_base->wtcon;
wtcon |= (0x63 << 8) | (0x03 << 3) | (0x01 << 5);
wtcon &= ~(0x01 << 1);
wtcon |= (0x01 << 0);
printk("wtcon %x\n", wtcon);
wtd.wtd_base->wtcnt = buf;
wtd.wtd_base->wtdat = buf;
wtd.wtd_base->wtcon = wtcon;
}

static void wtd_off(void)
{
printk("%s\n", __func__);
wtd.wtd_base->wtcon &= ~(0x01 << 5);
}

static void wtd_feed(unsigned long arg)
{
int ret;
unsigned int buf;
printk("%s\n", __func__);
ret = copy_from_user(&buf, (const void __user *)arg, 4);

if (ret < 0)
{
printk("%s copy_from_user error\n", __func__);
}

wtd.wtd_base->wtcnt = buf;
}

static void wtd_read(unsigned long arg)
{
int ret;
unsigned int buf = wtd.wtd_base->wtcnt;
printk("wtcnt %x\n", wtd.wtd_base->wtcnt);
ret = copy_to_user((void __user *)arg, &buf, 4);

if (ret < 0)
{
printk("%s copy_to_user error\n", __func__);
}
}

static long wtd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
{
switch (cmd)
{
case WTD_ON:
wtd_on(arg);
break;
case WTD_OFF:
wtd_off();
break;
case WTD_FEED:
wtd_feed(arg);
break;
case WTD_READ:
wtd_read(arg);
default :
return -EINVAL;
};

return 0;
}

static int wtd_open(struct inode *inode, struct file *file)
{
printk("wtd_open\n");
return 0;
}

static int wtd_release(struct inode *inode, struct file *file)
{
printk("wtd_exit\n");
return 0;
}

static struct file_operations wtd_fops =
{
.owner              = THIS_MODULE,
.open               = wtd_open,
.release            = wtd_release,
.unlocked_ioctl     = wtd_ioctl,
};

static int wtd_probe(struct platform_device *pdev)
{
dev_t       devid;
struct      device      *dev    = &pdev->dev;
struct      resource    *res    = NULL;
struct      resource    *res1   = NULL;
int ret;
printk("enter %s\n", __func__);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);//reset mask /unit 8 pmu

if (res == NULL || res1 == NULL)
{
printk("platform_get_resource error\n");
return -EINVAL;
}

printk("res: %x\n", (unsigned int)res->start);
printk("res1: %x\n", (unsigned int)res1->start);
wtd.base_clk = devm_clk_get(&pdev->dev, "watchdog");

if (IS_ERR(wtd.base_clk))
{
dev_err(dev, "failed to get timer base clk\n");
return PTR_ERR(wtd.base_clk);
}

ret = clk_prepare_enable(wtd.base_clk);

if (ret != 0)
{
dev_err(dev, "failed to enable base clock\n");
return ret;
}

wtd.wtd_base = devm_ioremap_resource(&pdev->dev, res);
mask_wtd_reset = ioremap(res1->start, 0x04);
writel(0x00, mask_wtd_reset);

if (wtd.wtd_base == NULL)
{
printk("devm_ioremap_resource error\n");
goto err_clk;
}

if (alloc_chrdev_region(&devid, 0, 1, "wtd") < 0)
{
printk("%s ERROR\n", __func__);
goto err_clk;
}

major = MAJOR(devid);
cdev_init(&wtd_cdev, &wtd_fops);
cdev_add(&wtd_cdev, devid, 1);
cls = class_create(THIS_MODULE, "mywtd");
device_create(cls, NULL, MKDEV(major, 0), NULL, "wtd");
return 0;
err_clk:
clk_disable(wtd.base_clk);
clk_unprepare(wtd.base_clk);
return -EINVAL;
}

static int wtd_remove(struct platform_device *pdev)
{
printk("enter %s\n", __func__);
device_destroy(cls, MKDEV(major, 0));
class_destroy(cls);
cdev_del(&wtd_cdev);
unregister_chrdev_region(MKDEV(major, 0), 1);
clk_disable(wtd.base_clk);
clk_unprepare(wtd.base_clk);
iounmap(mask_wtd_reset);
printk("%s enter.\n", __func__);
return 0;
}

static const struct of_device_id wtd_dt_ids[] =
{
{ .compatible = "tiny4412,wtd_demo", },
{},
};

MODULE_DEVICE_TABLE(of, wtd_dt_ids);

static struct platform_driver wtd_driver =
{
.driver        = {
.name      = "wtd_demo",
.of_match_table    = of_match_ptr(wtd_dt_ids),
},
.probe         = wtd_probe,
.remove        = wtd_remove,
};

static int wtd_init(void)
{
int ret;
printk("enter %s\n", __func__);
ret = platform_driver_register(&wtd_driver);

if (ret)
{
printk(KERN_ERR "wtd demo: probe faiwtd: %d\n", ret);
}

return ret;
}

static void wtd_exit(void)
{
printk("enter %s\n", __func__);
platform_driver_unregister(&wtd_driver);
}

module_init(wtd_init);
module_exit(wtd_exit);
MODULE_LICENSE("GPL");