摄像头引脚定义

摄像头引脚定义

1 NC NO CONNECT

2 AGND Power Analog ground

3 SIO_D I/O SCCB serial interface data I/O

4 AVDD Power Analog power supply (VDD-A= 2.45 to 2.8 VDC)

5 SIO_C Input SCCB serial interface clock input

6 RESET Function (default = 0) Clears all registers and resets them to their default values. Active high, internal pull-down resistor.

7 VSYNC Output Vertical sync output

8 PWDN Function (default = 0) Power Down Mode Selection - active high, internal pull-down resistor. 0: Normal mode 1: Power down mode

9 HREF Output HREF output

10 DVDD Power Power supply (VDD-C= 1.8 VDC + 10%) for digital

output drive

11 DOVDD Power Digital power supply (VDD-IO= 2.5 to 3.3 VDC)

12 Y9 Output Output bit[9] - MSB for 10-bit RGB and 8-bit YUV

13 MCLK1 Input Crystal clock input

14 Y8 Output Output bit[8]

15 DGND Power Digital ground

16 Y7 Output Output bit[7]

17 PCLK Output Pixel clock output

18 Y6 Output Output bit[6]

19 Y2 Output Output bit[2] - LSB for 8-bit YUV

20 Y5 Output Output bit[5]

21 Y3 Output Output bit[3]

22 Y4 Output Output bit[4]

23 Y1 Output Output bit[1] - for 10-bit RGB only

24 Y0 Output Output bit[0] - LSB for 10-bit RGB only