基于tiny4412的u-boot移植（二）

[code]diff--gita/arch/arm/dts/Makefileb/arch/arm/dts/Makefile

index65b4230..26dddff100644

---a/arch/arm/dts/Makefile

+++b/arch/arm/dts/Makefile

@@-5,7+5,8@@dtb-$(CONFIG_EXYNOS4)+=exynos4210-origen.dtb\

exynos4210-universal_c210.dtb\

exynos4210-trats.dtb\

exynos4412-trats2.dtb\

-exynos4412-odroid.dtb

+exynos4412-odroid.dtb\

+exynos4412-tiny4412.dtb

dtb-$(CONFIG_EXYNOS5)+=exynos5250-arndale.dtb\

exynos5250-snow.dtb\

[code]diff--gita/arch/arm/include/asm/mach-types.hb/arch/arm/include/asm/mach-types.h

indexd51be0b..1784a6b100644

---a/arch/arm/include/asm/mach-types.h

+++b/arch/arm/include/asm/mach-types.h

@@-1062,6+1062,7@@externunsignedint__machine_arch_type;

#defineMACH_TYPE_MONCH3453

#defineMACH_TYPE_CURACAO3454

#defineMACH_TYPE_ORIGEN3455

+#defineMACH_TYPE_TINY44124608

#defineMACH_TYPE_EPC103456

#defineMACH_TYPE_SGH_I7403457

#defineMACH_TYPE_TUNA3458

[code]diff--gita/arch/arm/mach-exynos/Kconfigb/arch/arm/mach-exynos/Kconfig

indexa6a7597..1845a78100644

---a/arch/arm/mach-exynos/Kconfig

+++b/arch/arm/mach-exynos/Kconfig

@@-19,6+19,10@@configTARGET_ORIGEN

bool"Exynos4412Origenboard"

selectSUPPORT_SPL

+configTARGET_TINY4412

+bool"Exynos4412Tiny4412board"

+selectSUPPORT_SPL

+

configTARGET_TRATS2

bool"Exynos4412Trat2board"

@@-76,6+80,7@@source"board/samsung/smdkv310/Kconfig"

source"board/samsung/trats/Kconfig"

source"board/samsung/universal_c210/Kconfig"

source"board/samsung/origen/Kconfig"

+source"board/samsung/tiny4412/Kconfig"

source"board/samsung/trats2/Kconfig"

source"board/samsung/odroid/Kconfig"

source"board/samsung/arndale/Kconfig"

[code]diff--gita/board/samsung/tiny4412/Kconfigb/board/samsung/tiny4412/Kconfig

newfilemode100644

index0000000..06a7905

---/dev/null

+++b/board/samsung/tiny4412/Kconfig

@@-0,0+1,12@@

+ifTARGET_TINY4412

+

+configSYS_BOARD

+default"tiny4412"

+

+configSYS_VENDOR

+default"samsung"

+

+configSYS_CONFIG_NAME

+default"tiny4412"

+

+endif

[code]---/dev/null

+++b/board/samsung/tiny4412/Makefile

@@-0,0+1,22@@

+#

+#Copyright(C)2011SamsungElectronics

+#

+#SPDX-License-Identifier:GPL-2.0+

+#

+

+ifdefCONFIG_SPL_BUILD

+#necessarytocreatebuilt-in.o

+obj-:=__dummy__.o

+

+hostprogs-y:=tools/mktiny4412spl

+always:=$(hostprogs-y)

+

+#omit-O2optiontosuppress

+#warning:dereferencingtype-punnedpointerwillbreakstrict-aliasingrules

+#

+#TODO:

+#Fixtherootcauseintools/mkorigenspl.canddeletethefollowingwork-around

+$(obj)/tools/mktiny4412spl:HOSTCFLAGS:=$(filter-out-O2,$(HOSTCFLAGS))

+else

+obj-y+=tiny4412.o

+endif

[code]diff--gita/arch/arm/dts/exynos4412-tiny4412.dtsb/arch/arm/dts/exynos4412-tiny4412.dts

newfilemode100644

index0000000..d2122f3

---/dev/null

+++b/arch/arm/dts/exynos4412-tiny4412.dts

@@-0,0+1,29@@

+/*

+*Tiny4412boarddevicetreesource

+*

+*Copyright(c)2014SamsungElectronicsCo.,Ltd.

+*'target='_blank'>http://www.samsung.com[/code]
+*


+*SPDX-License-Identifier:GPL-2.0+


+*/


+


+/dts-v1/;


+#include"exynos4412.dtsi"


+


+/{


+model="Tiny4412basedonExynos4412";


+compatible="samsung,tiny4412","samsung,exynos4412";


+


+chosen{


+stdout-path="serial0";


+};


+


+aliases{


+serial0="/serial@13800000";


+console="/serial@13800000";


+};


+


+serial0:serial@13810000{


+status="okay";


+};


+};

[/code]

3.7修改arch/arm/mach-exynos/Makefile，在tiny4412.h中会定义CONFIG_TINY4412这个宏



[code]diff--gita/arch/arm/mach-exynos/Makefileb/arch/arm/mach-exynos/Makefile


index8542f89..1b13070100644


---a/arch/arm/mach-exynos/Makefile


+++b/arch/arm/mach-exynos/Makefile


@@-12,7+12,9@@obj-$(CONFIG_EXYNOS5420)+=sec_boot.o


ifdefCONFIG_SPL_BUILD


obj-$(CONFIG_EXYNOS5)+=clock_init_exynos5.o


obj-$(CONFIG_EXYNOS5)+=dmc_common.odmc_init_ddr3.o


-obj-$(CONFIG_EXYNOS4210)+=dmc_init_exynos4.oclock_init_exynos4.o


+ifneq(,$(filtery,$(CONFIG_EXYNOS4210)$(CONFIG_TINY4412)))


+obj-y+=dmc_init_exynos4.oclock_init_exynos4.o


+endif


obj-y+=spl_boot.o


obj-y+=lowlevel_init.o


endif

[/code]

3.8修改arch/arm/mach-exynos/clock_init_exynos4.c，时钟初始化



[code]diff--gita/arch/arm/mach-exynos/clock_init_exynos4.cb/arch/arm/mach-exynos/clock_init_exynos4.c


index584e4ba..e07e32e100644


---a/arch/arm/mach-exynos/clock_init_exynos4.c


+++b/arch/arm/mach-exynos/clock_init_exynos4.c


@@-30,7+30,11@@


#include<;asm/arch/clk.h>


#include<;asm/arch/clock.h>


#include"common_setup.h"


+#ifdefCONFIG_TINY4412


+#include"tiny4412_setup.h"


+#else


#include"exynos4_setup.h"


+#endif




/*


*system_clock_init:Initializecoreclockandbusclock.


@@-38,6+42,269@@


*/


voidsystem_clock_init(void)


{


+#ifdefCONFIG_TINY4412


+unsignedintset,clr,clr_src_cpu,clr_pll_con0,clr_src_dmc;


+structexynos4x12_clock*clk=(structexynos4x12_clock*)


+samsung_get_base_clock();


+


+/*


+*CMU_CPUclockssrctoMPLL


+*Bitvalues:0;1


+*MUX_APLL_SEL:FIN_PLL;FOUT_APLL


+*MUX_CORE_SEL:MOUT_APLL;SCLK_MPLL


+*MUX_HPM_SEL:MOUT_APLL;SCLK_MPLL_USER_C


+*MUX_MPLL_USER_SEL_C:FIN_PLL;SCLK_MPLL


+*/


+clr_src_cpu=MUX_APLL_SEL(1)|MUX_CORE_SEL(1)|


+MUX_HPM_SEL(1)|MUX_MPLL_USER_SEL_C(1);


+set=MUX_APLL_SEL(0)|MUX_CORE_SEL(1)|MUX_HPM_SEL(1)|


+MUX_MPLL_USER_SEL_C(1);


+


+clrsetbits_le32(&;clk->src_cpu,clr_src_cpu,set);


+


+/*Waitformuxchange*/


+while(readl(&;clk->mux_stat_cpu)&MUX_STAT_CPU_CHANGING)


+continue;


+


+/*SetAPLLto1400MHz*/


+clr_pll_con0=SDIV(7)|PDIV(63)|MDIV(1023)|FSEL(1);


+set=SDIV(0x0)|PDIV(0x3)|MDIV(0xAF)|FSEL(1);


+


+clrsetbits_le32(&;clk->apll_con0,clr_pll_con0,set);


+


+/*WaitforPLLtobelocked*/


+while(!(readl(&;clk->apll_con0)&PLL_LOCKED_BIT))


+continue;


+


+/*SetCMU_CPUclockssrctoAPLL*/


+set=MUX_APLL_SEL(1)|MUX_CORE_SEL(0)|MUX_HPM_SEL(0)|


+MUX_MPLL_USER_SEL_C(1);


+clrsetbits_le32(&clk->src_cpu,clr_src_cpu,set);


+


+/*Waitformuxchange*/


+while(readl(&;clk->mux_stat_cpu)&MUX_STAT_CPU_CHANGING)


+continue;


+


+set=CORE_RATIO(0)|COREM0_RATIO(2)|COREM1_RATIO(5)|


+PERIPH_RATIO(0)|ATB_RATIO(4)|PCLK_DBG_RATIO(1)|


+APLL_RATIO(0)|CORE2_RATIO(0);


+/*


+*SetdividersforMOUTcore=1400MHz


+*coreout=MOUT/(ratio+1)=1400MHz(0)


+*corem0=armclk/(ratio+1)=466MHz(2)


+*corem1=armclk/(ratio+1)=233MHz(5)


+*periph=armclk/(ratio+1)=1400MHz(0)


+*atbout=MOUT/(ratio+1)=280MHz(4)


+*pclkdbgout=atbout/(ratio+1)=140MHz(1)


+*sclkapll=MOUTapll/(ratio+1)=1400MHz(0)


+*core2out=core_out/(ratio+1)=1400MHz(0)(armclk)


+*/


+clr=CORE_RATIO(7)|COREM0_RATIO(7)|COREM1_RATIO(7)|


+PERIPH_RATIO(7)|ATB_RATIO(7)|PCLK_DBG_RATIO(7)|


+APLL_RATIO(7)|CORE2_RATIO(7);


+


+clrsetbits_le32(&;clk->div_cpu0,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_cpu0)&DIV_STAT_CPU0_CHANGING)


+continue;


+


+/*


+*ForMOUThpm=1400MHz(MOUTapll)


+*doutcopy=MOUThpm/(ratio+1)=280(4)


+*sclkhpm=doutcopy/(ratio+1)=280(4)


+*cores_out=armclk/(ratio+1)=280(4)


+*/


+clr=COPY_RATIO(7)|HPM_RATIO(7)|CORES_RATIO(7);


+set=COPY_RATIO(4)|HPM_RATIO(4)|CORES_RATIO(4);


+


+clrsetbits_le32(&;clk->div_cpu1,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_cpu1)&DIV_STAT_CPU1_CHANGING)


+continue;


+


+/*


+*SetCMU_DMCclockssrctoAPLL


+*Bitvalues:0;1


+*MUX_C2C_SEL:SCLKMPLL;SCLKAPLL


+*MUX_DMC_BUS_SEL:SCLKMPLL;SCLKAPLL


+*MUX_DPHY_SEL:SCLKMPLL;SCLKAPLL


+*MUX_MPLL_SEL:FINPLL;MOUT_MPLL_FOUT


+*MUX_PWI_SEL:0110(MPLL);0111(EPLL);1000(VPLL);0(XXTI)


+*MUX_G2D_ACP0_SEL:SCLKMPLL;SCLKAPLL


+*MUX_G2D_ACP1_SEL:SCLKEPLL;SCLKVPLL


+*MUX_G2D_ACP_SEL:OUT_ACP0;OUT_ACP1


+*/


+clr_src_dmc=MUX_C2C_SEL(1)|MUX_DMC_BUS_SEL(1)|


+MUX_DPHY_SEL(1)|MUX_MPLL_SEL(1)|


+MUX_PWI_SEL(15)|MUX_G2D_ACP0_SEL(1)|


+MUX_G2D_ACP1_SEL(1)|MUX_G2D_ACP_SEL(1);


+set=MUX_C2C_SEL(1)|MUX_DMC_BUS_SEL(1)|MUX_DPHY_SEL(1)|


+MUX_MPLL_SEL(0)|MUX_PWI_SEL(0)|MUX_G2D_ACP0_SEL(1)|


+MUX_G2D_ACP1_SEL(1)|MUX_G2D_ACP_SEL(1);


+


+clrsetbits_le32(&;clk->src_dmc,clr_src_dmc,set);


+


+/*Waitformuxchange*/


+while(readl(&;clk->mux_stat_dmc)&MUX_STAT_DMC_CHANGING)


+continue;


+


+/*SetMPLLto800MHz*/


+set=SDIV(0)|PDIV(3)|MDIV(100)|FSEL(0)|PLL_ENABLE(1);


+


+clrsetbits_le32(&;clk->mpll_con0,clr_pll_con0,set);


+


+/*WaitforPLLtobelocked*/


+while(!(readl(&;clk->mpll_con0)&PLL_LOCKED_BIT))


+continue;


+


+/*SwitchbackCMU_DMCmux*/


+set=MUX_C2C_SEL(0)|MUX_DMC_BUS_SEL(0)|MUX_DPHY_SEL(0)|


+MUX_MPLL_SEL(1)|MUX_PWI_SEL(6)|MUX_G2D_ACP0_SEL(0)|


+MUX_G2D_ACP1_SEL(0)|MUX_G2D_ACP_SEL(0);


+


+clrsetbits_le32(&;clk->src_dmc,clr_src_dmc,set);


+


+/*Waitformuxchange*/


+while(readl(&;clk->mux_stat_dmc)&MUX_STAT_DMC_CHANGING)


+continue;


+


+/*CLK_DIV_DMC0*/


+clr=ACP_RATIO(7)|ACP_PCLK_RATIO(7)|DPHY_RATIO(7)|


+DMC_RATIO(7)|DMCD_RATIO(7)|DMCP_RATIO(7);


+/*


+*For:


+*MOUTdmc=800MHz


+*MOUTdphy=800MHz


+*


+*aclk_acp=MOUTdmc/(ratio+1)=200(3)


+*pclk_acp=aclk_acp/(ratio+1)=100(1)


+*sclk_dphy=MOUTdphy/(ratio+1)=400(1)


+*sclk_dmc=MOUTdmc/(ratio+1)=400(1)


+*aclk_dmcd=sclk_dmc/(ratio+1)=200(1)


+*aclk_dmcp=aclk_dmcd/(ratio+1)=100(1)


+*/


+set=ACP_RATIO(3)|ACP_PCLK_RATIO(1)|DPHY_RATIO(1)|


+DMC_RATIO(1)|DMCD_RATIO(1)|DMCP_RATIO(1);


+


+clrsetbits_le32(&;clk->div_dmc0,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_dmc0)&DIV_STAT_DMC0_CHANGING)


+continue;


+


+/*CLK_DIV_DMC1*/


+clr=G2D_ACP_RATIO(15)|C2C_RATIO(7)|PWI_RATIO(15)|


+C2C_ACLK_RATIO(7)|DVSEM_RATIO(127)|DPM_RATIO(127);


+/*


+*For:


+*MOUTg2d=800MHz


+*MOUTc2c=800Mhz


+*MOUTpwi=800MHz


+*


+*sclk_g2d_acp=MOUTg2d/(ratio+1)=200(3)


+*sclk_c2c=MOUTc2c/(ratio+1)=400(1)


+*aclk_c2c=sclk_c2c/(ratio+1)=200(1)


+*sclk_pwi=MOUTpwi/(ratio+1)=100(7)


+*/


+set=G2D_ACP_RATIO(3)|C2C_RATIO(1)|PWI_RATIO(7)|


+C2C_ACLK_RATIO(1)|DVSEM_RATIO(1)|DPM_RATIO(1);


+


+clrsetbits_le32(&;clk->div_dmc1,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_dmc1)&DIV_STAT_DMC1_CHANGING)


+continue;


+


+/*CLK_SRC_PERIL0*/


+clr=UART0_SEL(15)|UART1_SEL(15)|UART2_SEL(15)|


+UART3_SEL(15)|UART4_SEL(15);


+/*


+*SetCLK_SRC_PERIL0clockssrctoMPLL


+*srcvalues:0(XXTI);1(XusbXTI);2(SCLK_HDMI24M);3(SCLK_USBPHY0);


+*5(SCLK_HDMIPHY);6(SCLK_MPLL_USER_T);7(SCLK_EPLL);


+*8(SCLK_VPLL)


+*


+*SetalltoSCLK_MPLL_USER_T


+*/


+set=UART0_SEL(6)|UART1_SEL(6)|UART2_SEL(6)|UART3_SEL(6)|


+UART4_SEL(6);


+


+clrsetbits_le32(&;clk->src_peril0,clr,set);


+


+/*CLK_DIV_PERIL0*/


+clr=UART0_RATIO(15)|UART1_RATIO(15)|UART2_RATIO(15)|


+UART3_RATIO(15)|UART4_RATIO(15);


+/*


+*ForMOUTuart0-4:800MHz


+*


+*SCLK_UARTx=MOUTuartX/(ratio+1)=100(7)


+*/


+set=UART0_RATIO(7)|UART1_RATIO(7)|UART2_RATIO(7)|


+UART3_RATIO(7)|UART4_RATIO(7);


+


+clrsetbits_le32(&;clk->div_peril0,clr,set);


+


+while(readl(&;clk->div_stat_peril0)&DIV_STAT_PERIL0_CHANGING)


+continue;


+


+/*CLK_DIV_FSYS1*/


+clr=MMC0_RATIO(15)|MMC0_PRE_RATIO(255)|MMC1_RATIO(15)|


+MMC1_PRE_RATIO(255);


+/*


+*ForMOUTmmc0-3=800MHz(MPLL)


+*


+*DOUTmmc1=MOUTmmc1/(ratio+1)=100(7)


+*sclk_mmc1=DOUTmmc1/(ratio+1)=50(1)


+*DOUTmmc0=MOUTmmc0/(ratio+1)=100(7)


+*sclk_mmc0=DOUTmmc0/(ratio+1)=50(1)


+*/


+set=MMC0_RATIO(7)|MMC0_PRE_RATIO(1)|MMC1_RATIO(7)|


+MMC1_PRE_RATIO(1);


+


+clrsetbits_le32(&;clk->div_fsys1,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_fsys1)&DIV_STAT_FSYS1_CHANGING)


+continue;


+


+/*CLK_DIV_FSYS2*/


+clr=MMC2_RATIO(15)|MMC2_PRE_RATIO(255)|MMC3_RATIO(15)|


+MMC3_PRE_RATIO(255);


+/*


+*ForMOUTmmc0-3=800MHz(MPLL)


+*


+*DOUTmmc3=MOUTmmc3/(ratio+1)=100(7)


+*sclk_mmc3=DOUTmmc3/(ratio+1)=50(1)


+*DOUTmmc2=MOUTmmc2/(ratio+1)=100(7)


+*sclk_mmc2=DOUTmmc2/(ratio+1)=50(1)


+*/


+set=MMC2_RATIO(7)|MMC2_PRE_RATIO(1)|MMC3_RATIO(7)|


+MMC3_PRE_RATIO(1);


+


+clrsetbits_le32(&;clk->div_fsys2,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_fsys2)&DIV_STAT_FSYS2_CHANGING)


+continue;


+


+/*CLK_DIV_FSYS3*/


+clr=MMC4_RATIO(15)|MMC4_PRE_RATIO(255);


+/*


+*ForMOUTmmc4=800MHz(MPLL)


+*


+*DOUTmmc4=MOUTmmc4/(ratio+1)=100(7)


+*sclk_mmc4=DOUTmmc4/(ratio+1)=100(0)


+*/


+set=MMC4_RATIO(7)|MMC4_PRE_RATIO(0);


+


+clrsetbits_le32(&;clk->div_fsys3,clr,set);


+


+/*Waitfordividerreadystatus*/


+while(readl(&;clk->div_stat_fsys3)&DIV_STAT_FSYS3_CHANGING)


+continue;


+#else


structexynos4_clock*clk=


(structexynos4_clock*)samsung_get_base_clock();




@@-91,4+358,5@@voidsystem_clock_init(void)


writel(VPLL_CON0_VAL,&clk->vpll_con0);




sdelay(0x30000);


+#endif


}

[/code]

增加头文件arch/arm/mach-exynos/tiny4412_setup.h



[code]diff--gita/arch/arm/mach-exynos/tiny4412_setup.hb/arch/arm/mach-exynos/tiny4412_setup.h


newfilemode100644


index0000000..8c14e09


---/dev/null


+++b/arch/arm/mach-exynos/tiny4412_setup.h


@@-0,0+1,227@@


+/*


+*Copyright(C)2014SamsungElectronics


+*PrzemyslawMarczak<;p.marczak@samsung.com>


+*


+*SPDX-License-Identifier:GPL-2.0+


+*/


+


+#ifndef__TINY4412_SETUP__


+#define__TINY4412_SETUP__


+


+/*A/MPLL_CON0*/


+#defineSDIV(x)((x)&;0x7)


+#definePDIV(x)(((x)&;0x3f)<<8)


+#defineMDIV(x)(((x)&;0x3ff)<<16)


+#defineFSEL(x)(((x)&;0x1)<<27)


+#definePLL_LOCKED_BIT(0x1<;<29)


+#definePLL_ENABLE(x)(((x)&;0x1)<<31)


+


+/*CLK_SRC_CPU*/


+#defineMUX_APLL_SEL(x)((x)&;0x1)


+#defineMUX_CORE_SEL(x)(((x)&;0x1)<<16)


+#defineMUX_HPM_SEL(x)(((x)&;0x1)<<20)


+#defineMUX_MPLL_USER_SEL_C(x)(((x)&;0x1)<<24)


+


+#defineMUX_STAT_CHANGING0x100


+


+/*CLK_MUX_STAT_CPU*/


+#defineAPLL_SEL(x)((x)&;0x7)


+#defineCORE_SEL(x)(((x)&;0x7)<<16)


+#defineHPM_SEL(x)(((x)&;0x7)<<20)


+#defineMPLL_USER_SEL_C(x)(((x)&;0x7)<<24)


+#defineMUX_STAT_CPU_CHANGING(APLL_SEL(MUX_STAT_CHANGING)|\


+CORE_SEL(MUX_STAT_CHANGING)|\


+HPM_SEL(MUX_STAT_CHANGING)|\


+MPLL_USER_SEL_C(MUX_STAT_CHANGING))


+


+/*CLK_DIV_CPU0*/


+#defineCORE_RATIO(x)((x)&;0x7)


+#defineCOREM0_RATIO(x)(((x)&;0x7)<<4)


+#defineCOREM1_RATIO(x)(((x)&;0x7)<<8)


+#definePERIPH_RATIO(x)(((x)&;0x7)<<12)


+#defineATB_RATIO(x)(((x)&;0x7)<<16)


+#definePCLK_DBG_RATIO(x)(((x)&;0x7)<<20)


+#defineAPLL_RATIO(x)(((x)&;0x7)<<24)


+#defineCORE2_RATIO(x)(((x)&;0x7)<<28)


+


+/*CLK_DIV_STAT_CPU0*/


+#defineDIV_CORE(x)((x)&;0x1)


+#defineDIV_COREM0(x)(((x)&;0x1)<<4)


+#defineDIV_COREM1(x)(((x)&;0x1)<<8)


+#defineDIV_PERIPH(x)(((x)&;0x1)<<12)


+#defineDIV_ATB(x)(((x)&;0x1)<<16)


+#defineDIV_PCLK_DBG(x)(((x)&;0x1)<<20)


+#defineDIV_APLL(x)(((x)&;0x1)<<24)


+#defineDIV_CORE2(x)(((x)&;0x1)<<28)


+


+#defineDIV_STAT_CHANGING0x1


+#defineDIV_STAT_CPU0_CHANGING(DIV_CORE(DIV_STAT_CHANGING)|\


+DIV_COREM0(DIV_STAT_CHANGING)|\


+DIV_COREM1(DIV_STAT_CHANGING)|\


+DIV_PERIPH(DIV_STAT_CHANGING)|\


+DIV_ATB(DIV_STAT_CHANGING)|\


+DIV_PCLK_DBG(DIV_STAT_CHANGING)|\


+DIV_APLL(DIV_STAT_CHANGING)|\


+DIV_CORE2(DIV_STAT_CHANGING))


+


+/*CLK_DIV_CPU1*/


+#defineCOPY_RATIO(x)((x)&;0x7)


+#defineHPM_RATIO(x)(((x)&;0x7)<<4)


+#defineCORES_RATIO(x)(((x)&;0x7)<<8)


+


+/*CLK_DIV_STAT_CPU1*/


+#defineDIV_COPY(x)((x)&;0x7)


+#defineDIV_HPM(x)(((x)&;0x1)<<4)


+#defineDIV_CORES(x)(((x)&;0x1)<<8)


+


+#defineDIV_STAT_CPU1_CHANGING(DIV_COPY(DIV_STAT_CHANGING)|\


+DIV_HPM(DIV_STAT_CHANGING)|\


+DIV_CORES(DIV_STAT_CHANGING))


+


+/*CLK_SRC_DMC*/


+#defineMUX_C2C_SEL(x)((x)&;0x1)


+#defineMUX_DMC_BUS_SEL(x)(((x)&;0x1)<<4)


+#defineMUX_DPHY_SEL(x)(((x)&;0x1)<<8)


+#defineMUX_MPLL_SEL(x)(((x)&;0x1)<<12)


+#defineMUX_PWI_SEL(x)(((x)&;0xf)<<16)


+#defineMUX_G2D_ACP0_SEL(x)(((x)&;0x1)<<20)


+#defineMUX_G2D_ACP1_SEL(x)(((x)&;0x1)<<24)


+#defineMUX_G2D_ACP_SEL(x)(((x)&;0x1)<<28)


+


+/*CLK_MUX_STAT_DMC*/


+#defineC2C_SEL(x)(((x))&;0x7)


+#defineDMC_BUS_SEL(x)(((x)&;0x7)<<4)


+#defineDPHY_SEL(x)(((x)&;0x7)<<8)


+#defineMPLL_SEL(x)(((x)&;0x7)<<12)


+/*#definePWI_SEL(x)(((x)&;0xf)<<16)-Reserved*/


+#defineG2D_ACP0_SEL(x)(((x)&;0x7)<<20)


+#defineG2D_ACP1_SEL(x)(((x)&;0x7)<<24)


+#defineG2D_ACP_SEL(x)(((x)&;0x7)<<28)


+


+#defineMUX_STAT_DMC_CHANGING(C2C_SEL(MUX_STAT_CHANGING)|\


+DMC_BUS_SEL(MUX_STAT_CHANGING)|\


+DPHY_SEL(MUX_STAT_CHANGING)|\


+MPLL_SEL(MUX_STAT_CHANGING)|\


+G2D_ACP0_SEL(MUX_STAT_CHANGING)|\


+G2D_ACP1_SEL(MUX_STAT_CHANGING)|\


+G2D_ACP_SEL(MUX_STAT_CHANGING))


+


+/*CLK_DIV_DMC0*/


+#defineACP_RATIO(x)((x)&;0x7)


+#defineACP_PCLK_RATIO(x)(((x)&;0x7)<<4)


+#defineDPHY_RATIO(x)(((x)&;0x7)<<8)


+#defineDMC_RATIO(x)(((x)&;0x7)<<12)


+#defineDMCD_RATIO(x)(((x)&;0x7)<<16)


+#defineDMCP_RATIO(x)(((x)&;0x7)<<20)


+


+/*CLK_DIV_STAT_DMC0*/


+#defineDIV_ACP(x)((x)&;0x1)


+#defineDIV_ACP_PCLK(x)(((x)&;0x1)<<4)


+#defineDIV_DPHY(x)(((x)&;0x1)<<8)


+#defineDIV_DMC(x)(((x)&;0x1)<<12)


+#defineDIV_DMCD(x)(((x)&;0x1)<<16)


+#defineDIV_DMCP(x)(((x)&;0x1)<<20)


+


+#defineDIV_STAT_DMC0_CHANGING(DIV_ACP(DIV_STAT_CHANGING)|\


+DIV_ACP_PCLK(DIV_STAT_CHANGING)|\


+DIV_DPHY(DIV_STAT_CHANGING)|\


+DIV_DMC(DIV_STAT_CHANGING)|\


+DIV_DMCD(DIV_STAT_CHANGING)|\


+DIV_DMCP(DIV_STAT_CHANGING))


+


+/*CLK_DIV_DMC1*/


+#defineG2D_ACP_RATIO(x)((x)&;0xf)


+#defineC2C_RATIO(x)(((x)&;0x7)<<4)


+#definePWI_RATIO(x)(((x)&;0xf)<<8)


+#defineC2C_ACLK_RATIO(x)(((x)&;0x7)<<12)


+#defineDVSEM_RATIO(x)(((x)&;0x7f)<<16)


+#defineDPM_RATIO(x)(((x)&;0x7f)<<24)


+


+/*CLK_DIV_STAT_DMC1*/


+#defineDIV_G2D_ACP(x)((x)&;0x1)


+#defineDIV_C2C(x)(((x)&;0x1)<<4)


+#defineDIV_PWI(x)(((x)&;0x1)<<8)


+#defineDIV_C2C_ACLK(x)(((x)&;0x1)<<12)


+#defineDIV_DVSEM(x)(((x)&;0x1)<<16)


+#defineDIV_DPM(x)(((x)&;0x1)<<24)


+


+#defineDIV_STAT_DMC1_CHANGING(DIV_G2D_ACP(DIV_STAT_CHANGING)|\


+DIV_C2C(DIV_STAT_CHANGING)|\


+DIV_PWI(DIV_STAT_CHANGING)|\


+DIV_C2C_ACLK(DIV_STAT_CHANGING)|\


+DIV_DVSEM(DIV_STAT_CHANGING)|\


+DIV_DPM(DIV_STAT_CHANGING))


+


+/*SetCLK_SRC_PERIL0*/


+#defineUART4_SEL(x)(((x)&;0xf)<<16)


+#defineUART3_SEL(x)(((x)&;0xf)<<12)


+#defineUART2_SEL(x)(((x)&;0xf)<<8)


+#defineUART1_SEL(x)(((x)&;0xf)<<4)


+#defineUART0_SEL(x)((x)&;0xf)


+


+/*SetCLK_DIV_PERIL0*/


+#defineUART4_RATIO(x)(((x)&;0xf)<<16)


+#defineUART3_RATIO(x)(((x)&;0xf)<<12)


+#defineUART2_RATIO(x)(((x)&;0xf)<<8)


+#defineUART1_RATIO(x)(((x)&;0xf)<<4)


+#defineUART0_RATIO(x)((x)&;0xf)


+


+/*SetCLK_DIV_STAT_PERIL0*/


+#defineDIV_UART4(x)(((x)&;0x1)<<16)


+#defineDIV_UART3(x)(((x)&;0x1)<<12)


+#defineDIV_UART2(x)(((x)&;0x1)<<8)


+#defineDIV_UART1(x)(((x)&;0x1)<<4)


+#defineDIV_UART0(x)((x)&;0x1)


+


+#defineDIV_STAT_PERIL0_CHANGING(DIV_UART4(DIV_STAT_CHANGING)|\


+DIV_UART3(DIV_STAT_CHANGING)|\


+DIV_UART2(DIV_STAT_CHANGING)|\


+DIV_UART1(DIV_STAT_CHANGING)|\


+DIV_UART0(DIV_STAT_CHANGING))


+


+/*CLK_DIV_FSYS1*/


+#defineMMC0_RATIO(x)((x)&;0xf)


+#defineMMC0_PRE_RATIO(x)(((x)&;0xff)<<8)


+#defineMMC1_RATIO(x)(((x)&;0xf)<<16)


+#defineMMC1_PRE_RATIO(x)(((x)&;0xff)<<24)


+


+/*CLK_DIV_STAT_FSYS1*/


+#defineDIV_MMC0(x)((x)&;1)


+#defineDIV_MMC0_PRE(x)(((x)&;1)<<8)


+#defineDIV_MMC1(x)(((x)&;1)<<16)


+#defineDIV_MMC1_PRE(x)(((x)&;1)<<24)


+


+#defineDIV_STAT_FSYS1_CHANGING(DIV_MMC0(DIV_STAT_CHANGING)|\


+DIV_MMC0_PRE(DIV_STAT_CHANGING)|\


+DIV_MMC1(DIV_STAT_CHANGING)|\


+DIV_MMC1_PRE(DIV_STAT_CHANGING))


+


+/*CLK_DIV_FSYS2*/


+#defineMMC2_RATIO(x)((x)&;0xf)


+#defineMMC2_PRE_RATIO(x)(((x)&;0xff)<<8)


+#defineMMC3_RATIO(x)(((x)&;0xf)<<16)


+#defineMMC3_PRE_RATIO(x)(((x)&;0xff)<<24)


+


+/*CLK_DIV_STAT_FSYS2*/


+#defineDIV_MMC2(x)((x)&;0x1)


+#defineDIV_MMC2_PRE(x)(((x)&;0x1)<<8)


+#defineDIV_MMC3(x)(((x)&;0x1)<<16)


+#defineDIV_MMC3_PRE(x)(((x)&;0x1)<<24)


+


+#defineDIV_STAT_FSYS2_CHANGING(DIV_MMC2(DIV_STAT_CHANGING)|\


+DIV_MMC2_PRE(DIV_STAT_CHANGING)|\


+DIV_MMC3(DIV_STAT_CHANGING)|\


+DIV_MMC3_PRE(DIV_STAT_CHANGING))


+


+/*CLK_DIV_FSYS3*/


+#defineMMC4_RATIO(x)((x)&;0x7)


+#defineMMC4_PRE_RATIO(x)(((x)&;0xff)<<8)


+


+/*CLK_DIV_STAT_FSYS3*/


+#defineDIV_MMC4(x)((x)&;0x1)


+#defineDIV_MMC4_PRE(x)(((x)&;0x1)<<8)


+


+#defineDIV_STAT_FSYS3_CHANGING(DIV_MMC4(DIV_STAT_CHANGING)|\


+DIV_MMC4_PRE(DIV_STAT_CHANGING))


+


+#endif/*__ODROIDU3_SETUP__*/

[/code]

3.9修改arch/arm/mach-exynos/dmc_init_exynos4.c，内存控制器初始化



[code]diff--gita/arch/arm/mach-exynos/dmc_init_exynos4.cb/arch/arm/mach-exynos/dmc_init_exynos4.c


indexecddc72..4ddb782100644


---a/arch/arm/mach-exynos/dmc_init_exynos4.c


+++b/arch/arm/mach-exynos/dmc_init_exynos4.c


@@-28,6+28,28@@


#include"common_setup.h"


#include"exynos4_setup.h"




+#ifdefCONFIG_TINY4412


+structmem_timingsmem={


+.direct_cmd_msr={


+DIRECT_CMD1,DIRECT_CMD2,DIRECT_CMD3,DIRECT_CMD4


+},


+.timingref=0x000000BB,


+.timingrow=0x4046654f,


+.timingdata=0x46400506,


+.timingpower=0x52000A3C,


+.zqcontrol=0xE3854C03,


+.control0=0x71101008,


+.control1=0xe0000086,


+.control2=0x00000000,


+.concontrol=0x0FFF301A,


+.prechconfig=0xff000000,


+.memcontrol=0x00312640,


+.memconfig0=0x40e01323,


+.memconfig1=0x60e01323,


+.dll_resync=FORCE_DLL_RESYNC,


+.dll_on=DLL_CONTROL_ON,


+};


+#else


structmem_timingsmem={


.direct_cmd_msr={


DIRECT_CMD1,DIRECT_CMD2,DIRECT_CMD3,DIRECT_CMD4


@@-48,6+70,8@@structmem_timingsmem={


.dll_resync=FORCE_DLL_RESYNC,


.dll_on=DLL_CONTROL_ON,


};


+#endif


+


staticvoidphy_control_reset(intctrl_no,structexynos4_dmc*dmc)


{


if(ctrl_no){


@@-124,6+148,10@@staticvoiddmc_init(structexynos4_dmc*dmc)


writel(mem.memconfig0,&;dmc->memconfig0);


writel(mem.memconfig1,&;dmc->memconfig1);




+#ifdefCONFIG_TINY4412


+writel(0x8000001F,&;dmc->ivcontrol);


+#endif


+


/*ConfigPrechargePolicy*/


writel(mem.prechconfig,&;dmc->prechconfig);


/*


@@-175,6+203,7@@voidmem_ctrl_init(intreset)


*0:full_sync


*/


writel(1,ASYNC_CONFIG);


+#ifndefCONFIG_TINY4412


#ifdefCONFIG_ORIGEN


/*Interleave:2Bit,Interleave_bit1:0x15,Interleave_bit0:0x7*/


writel(APB_SFR_INTERLEAVE_CONF_VAL,EXYNOS4_MIU_BASE+


@@-204,6+233,7@@voidmem_ctrl_init(intreset)


ABP_SFR_SLV_ADDRMAP_CONF_OFFSET);


#endif


#endif


+#endif


/*DREX0*/


dmc=(structexynos4_dmc*)samsung_get_base_dmc_ctrl();


dmc_init(dmc);

[/code]

3.10修改arch/arm/mach-exynos/lowlevel_init.c，使用uart0作为调试串口



[code]diff--gita/arch/arm/mach-exynos/lowlevel_init.cb/arch/arm/mach-exynos/lowlevel_init.c


index6c39cb2..bccb74b100644


---a/arch/arm/mach-exynos/lowlevel_init.c


+++b/arch/arm/mach-exynos/lowlevel_init.c


@@-216,8+216,9@@intdo_lowlevel_init(void)


if(actions&;DO_CLOCKS){


system_clock_init();


#ifdefCONFIG_DEBUG_UART


-exynos_pinmux_config(PERIPH_ID_UART3,PINMUX_FLAG_NONE);


+exynos_pinmux_config(PERIPH_ID_UART0,PINMUX_FLAG_NONE);


debug_uart_init();


+printascii("UARTOK.\n\r");


#endif


mem_ctrl_init(actions&;DO_MEM_RESET);


tzpc_init();

[/code]

3.11修改arch/arm/mach-exynos/spl_boot.c，从sdcard中拷贝u-boot到dram中，目前的移植有些问题，调用iROM提供的读取sdcard的函数，发现无法直接将u-boot从sdcard拷贝到dram中，所以我想了一个walkround的办法，首先利用iROM提供的sdcard读取函数将u-boot从sdcard拷贝到iRAM中，然后再将u-boot从iRAM中拷贝到DRAM中。



[code]diff--gita/arch/arm/mach-exynos/spl_boot.cb/arch/arm/mach-exynos/spl_boot.c


indexc7f943e..1474b9d100644


---a/arch/arm/mach-exynos/spl_boot.c


+++b/arch/arm/mach-exynos/spl_boot.c


@@-15,6+15,7@@


#include<;asm/arch/power.h>


#include<;asm/arch/spl.h>


#include<;asm/arch/spi.h>


+#include<;debug_uart.h>




#include"common_setup.h"


#include"clock_init.h"


@@-185,7+186,7@@voidcopy_uboot_to_ram(void)


{


unsignedintbootmode=BOOT_MODE_OM;




-u32(*copy_bl2)(u32offset,u32nblock,u32dst)=NULL;


+u32(*copy_uboot)(u32offset,u32nblock,u32dst)=NULL;


u32offset=0,size=0;


#ifdefCONFIG_SPI_BOOTING


structspl_machine_param*param=spl_get_machine_params();


@@-213,7+214,6@@voidcopy_uboot_to_ram(void)




if(bootmode==BOOT_MODE_OM)


bootmode=get_boot_mode();


-


switch(bootmode){


#ifdefCONFIG_SPI_BOOTING


caseBOOT_MODE_SERIAL:


@@-222,9+222,9@@voidcopy_uboot_to_ram(void)


break;


#endif


caseBOOT_MODE_SD:


-offset=BL2_START_OFFSET;


-size=BL2_SIZE_BLOC_COUNT;


-copy_bl2=get_irom_func(MMC_INDEX);


+offset=UBOOT_START_OFFSET;


+size=UBOOT_SIZE_BLOC_COUNT;


+copy_uboot=get_irom_func(MMC_INDEX);


break;


#ifdefCONFIG_SUPPORT_EMMC_BOOT


caseBOOT_MODE_EMMC:


@@-253,9+253,34@@voidcopy_uboot_to_ram(void)


default:


break;


}


-


-if(copy_bl2)


-copy_bl2(offset,size,CONFIG_SYS_TEXT_BASE);


+#ifdefCONFIG_TINY4412


+if(copy_uboot)


+{


+/*


+*HereIuseiram0x020250000-0x020260000(64k)


+*asanbuffer,andcopyu-bootfromsdcardto


+*thisbuffer,thencopyittodramstarted


+*from0x43e00000.


+*


+*/


+unsignedinti,count=0;


+unsignedchar*buffer=(unsignedchar*)0x02050000;


+unsignedchar*dst=(unsignedchar*)CONFIG_SYS_TEXT_BASE;


+unsignedintstep=(0x10000/512);


+


+for(count=0;count<UBOOT_SIZE_BLOC_COUNT;count+=step){


+/*copyu-bootfromsdcardtoiramfirstly.*/


+copy_uboot((u32)(UBOOT_START_OFFSET+count),(u32)step,(u32)buffer);


+/*thencopyu-bootfromiramtodram.*/


+for(i=0;i<0x10000;i++){


+*dst++=buffer[i];


+}


+}


+}


+#else


+if(copy_uboot)


+copy_uboot(offset,size,CONFIG_SYS_TEXT_BASE);


+#endif


}




voidmemzero(void*s,size_tn)

[/code]

3.12修改common/board_f.c，调试信息，看是否运行到u-boot



[code]diff--gita/common/board_f.cb/common/board_f.c


index613332e..6c7f911100644


---a/common/board_f.c


+++b/common/board_f.c


@@-58,6+58,7@@


#endif


#include<;dm/root.h>


#include<;linux/compiler.h>


+#include<;debug_uart.h>




/*


*Pointertoinitialglobaldataarea


@@-977,6+978,7@@voidboard_init_f(ulongboot_flags)


zero_global_data();


#endif




+printascii("Ubootrunning.\n\r");


gd->flags=boot_flags;


gd->have_console=0;

[/code]

3.13修改configs/tiny4412_defconfig



[code]diff--gita/configs/tiny4412_defconfigb/configs/tiny4412_defconfig


newfilemode100644


index0000000..3f2642a


---/dev/null


+++b/configs/tiny4412_defconfig


@@-0,0+1,15@@


+CONFIG_ARM=y


+CONFIG_ARCH_EXYNOS=y


+CONFIG_TARGET_TINY4412=y


+CONFIG_DEFAULT_DEVICE_TREE="exynos4412-tiny4412"


+CONFIG_SPL=y


+CONFIG_SYS_PROMPT="TINY4412#"


+#CONFIG_CMD_IMLSisnotset


+#CONFIG_CMD_XIMGisnotset


+#CONFIG_CMD_FPGAisnotset


+#CONFIG_CMD_NETisnotset


+#CONFIG_CMD_NFSisnotset


+#CONFIG_CMD_MISCisnotset


+CONFIG_OF_CONTROL=y


+CONFIG_USB=y


+CONFIG_DM_USB=y

[/code]

3.14修改drivers/serial/serial_s5p.c，配置串口的波特率、格式等信息



[code]diff--gita/drivers/serial/serial_s5p.cb/drivers/serial/serial_s5p.c


index3f0b588..70a5f17100644


---a/drivers/serial/serial_s5p.c


+++b/drivers/serial/serial_s5p.c


@@-62,12+62,12@@staticconstintudivslot[]={


staticvoid__maybe_unuseds5p_serial_init(structs5p_uart*uart)


{


/*enableFIFOs,autoclearRxFIFO*/


-writel(0x3,&;uart->ufcon);


+writel(0x111,&;uart->ufcon);


writel(0,&;uart->umcon);


/*8N1*/


writel(0x3,&;uart->ulcon);


/*Nointerrupts,noDMA,purepolling*/


-writel(0x245,&;uart->ucon);


+writel(0x3c5,&;uart->ucon);


}




staticvoid__maybe_unuseds5p_serial_baud(structs5p_uart*uart,uintuclk,

[/code]

3.15修改include/configs/tiny4412.h

这里有几点需要注意：

1、SPL的链接地址CONFIG_SPL_TEXT_BASE，它的值是0x02023400

2、U-boot的链接地址CONFIG_SYS_TEXT_BASE，它的值是0x43e00000

3、SD卡的布局



[code]diff--gita/include/configs/tiny4412.hb/include/configs/tiny4412.h


newfilemode100644


index0000000..f9a0630


---/dev/null


+++b/include/configs/tiny4412.h


@@-0,0+1,141@@


+/*


+*Copyright(C)2011SamsungElectronics


+*


+*ConfigurationsettingsfortheSAMSUNGTINY4412(EXYNOS4412)board.


+*


+*SPDX-License-Identifier:GPL-2.0+


+*/


+


+#ifndef__CONFIG_TINY4412_H


+#define__CONFIG_TINY4412_H


+


+#include<;configs/exynos4-common.h>


+


+/*HighLevelConfigurationOptions*/


+#defineCONFIG_TINY44121


+


+#defineCONFIG_SPL_SERIAL_SUPPORT


+#defineCONFIG_SPL_GPIO_SUPPORT


+#defineCONFIG_DEBUG_UART


+#defineCONFIG_DEBUG_UART_S5P


+#defineCONFIG_DEBUG_UART_BASE0x13800000/*UART0baseaddress*/


+#defineCONFIG_DEBUG_UART_CLOCK(100000000)/*SCLK_UART0is100MHz*/


+


+#defineCONFIG_SYS_DCACHE_OFF1


+


+/*ORIGENhas4bankofDRAM*/


+#defineCONFIG_NR_DRAM_BANKS4


+#defineCONFIG_SYS_SDRAM_BASE0x40000000


+#definePHYS_SDRAM_1CONFIG_SYS_SDRAM_BASE


+#defineSDRAM_BANK_SIZE(256<;<20)/*256MB*/


+


+/*memtestworkson*/


+#defineCONFIG_SYS_MEMTEST_STARTCONFIG_SYS_SDRAM_BASE


+#defineCONFIG_SYS_MEMTEST_END(CONFIG_SYS_SDRAM_BASE+0x6000000)


+#defineCONFIG_SYS_LOAD_ADDR(CONFIG_SYS_SDRAM_BASE+0x3E00000)


+


+#defineCONFIG_SYS_TEXT_BASE0x43E00000


+


+#defineCONFIG_MACH_TYPEMACH_TYPE_TINY4412


+


+/*selectserialconsoleconfiguration*/


+#defineCONFIG_SERIAL2


+#defineCONFIG_BAUDRATE115200


+


+/*Consoleconfiguration*/


+#defineCONFIG_SYS_CONSOLE_INFO_QUIET


+#defineCONFIG_SYS_CONSOLE_IS_IN_ENV


+#defineCONFIG_DEFAULT_CONSOLE"console=ttySAC1,115200n8\0"


+


+#defineCONFIG_SYS_MEM_TOP_HIDE(1<;<20)/*ramconsole*/


+


+#defineCONFIG_SYS_MONITOR_BASE0x00000000


+


+/*PowerDownModes*/


+#defineS5P_CHECK_SLEEP0x00000BAD


+#defineS5P_CHECK_DIDLE0xBAD00000


+#defineS5P_CHECK_LPA0xABAD0000


+


+#undefCONFIG_CMD_PING


+#defineCONFIG_CMD_ELF


+#defineCONFIG_CMD_DHCP


+#defineCONFIG_CMD_EXT2


+#defineCONFIG_CMD_FS_GENERIC


+#defineCONFIG_CMD_BOOTZ


+#defineCONFIG_SUPPORT_RAW_INITRD


+


+/*MMCSPL*/


+#defineCOPY_BL2_FNPTR_ADDR0x02020030


+/*Becausebl1willcopybl2(spl)toiramaddress0x02023400*/


+#defineCONFIG_SPL_TEXT_BASE0x02023400


+


+#defineCONFIG_EXTRA_ENV_SETTINGS\


+"loadaddr=0x40007000\0"\


+"rdaddr=0x48000000\0"\


+"kerneladdr=0x40007000\0"\


+"ramdiskaddr=0x48000000\0"\


+"console=ttySAC2,115200n8\0"\


+"mmcdev=0\0"\


+"bootenv=uEnv.txt\0"\


+"loadbootenv=loadmmc${mmcdev}${loadaddr}${bootenv}\0"\


+"importbootenv=echoImportingenvironmentfrommmc...;"\


+"envimport-t$loadaddr$filesize\0"\


+"loadbootscript=loadmmc${mmcdev}${loadaddr}boot.scr\0"\


+"bootscript=echoRunningbootscriptfrommmc${mmcdev}...;"\


+"source${loadaddr}\0"


+#defineCONFIG_BOOTCOMMAND\


+"ifmmcrescan;then"\


+"echoSD/MMCfoundondevice${mmcdev};"\


+"ifrunloadbootenv;then"\


+"echoLoadedenvironmentfrom${bootenv};"\


+"runimportbootenv;"\


+"fi;"\


+"iftest-n$uenvcmd;then"\


+"echoRunninguenvcmd...;"\


+"runuenvcmd;"\


+"fi;"\


+"ifrunloadbootscript;then"\


+"runbootscript;"\


+"fi;"\


+"fi;"\


+"loadmmc${mmcdev}${loadaddr}uImage;bootm${loadaddr}"


+


+#defineCONFIG_IDENT_STRING"forTINY4412"


+


+#defineCONFIG_CLK_1000_400_200


+


+/*MIU(MemoryInterleavingUnit)*/


+#defineCONFIG_MIU_2BIT_21_7_INTERLEAVED


+


+/*


+*SDMMClayout:


+*+------------+------------------------------------------------------------+


+*||


+*||||||


+*|512B|8K(bl1)|16k(bl2)|16k(ENV)|512k(u-boot)|


+*||||||


+*||


+*+------------+------------------------------------------------------------+


+*


+*/


+#defineCONFIG_ENV_IS_IN_MMC


+#defineCONFIG_SYS_MMC_ENV_DEV0


+#defineCONFIG_ENV_SIZE(16<;<10)/*16KB*/


+#defineRESERVE_BLOCK_SIZE(512)


+#defineBL1_SIZE(8<;<10)/*16KreservedforBL1*/


+#defineBL2_SIZE(16<;<10)/*16kreservedforBL2*/


+#defineCONFIG_ENV_OFFSET(RESERVE_BLOCK_SIZE+BL1_SIZE+BL2_SIZE)


+


+#defineCONFIG_SPL_LDSCRIPT"board/samsung/common/exynos-uboot-spl.lds"


+#defineCONFIG_SPL_MAX_FOOTPRINT(14*1024)


+


+#defineCONFIG_SYS_INIT_SP_ADDR0x02040000


+


+/*U-bootcopysizefrombootMediatoDRAM.*/


+#defineCOPY_UBOOT_SIZE0x80000


+#defineUBOOT_START_OFFSET((CONFIG_ENV_OFFSET+CONFIG_ENV_SIZE)/512)


+#defineUBOOT_SIZE_BLOC_COUNT(COPY_UBOOT_SIZE/512)


+


+/*#defineUBOOT_DEBUG_20151226*/


+


+#endif/*__CONFIG_H*/

[/code]

到此基本修改完毕

编译方法

修改Makfile，将CROSS_COMPILE设置为arm-linux-

编译maketiny4412_defconfig&&make

编译完成后会生成u-boot-dtb.bin和spl/u-boot-spl-dtb.bin

烧写

友善之臂提供的烧写脚本，但是不能直接使用，修改做如下修改：

1、修改sd_fuse/V310-EVT1-mkbl2.c用于生成BL2，生成的文件大小是14KB，最后4B为校验码



[code]diff--gita/sd_fuse/V310-EVT1-mkbl2.cb/sd_fuse/V310-EVT1-mkbl2.c


newfilemode100644


index0000000..54bb422


---/dev/null


+++b/sd_fuse/V310-EVT1-mkbl2.c


@@-0,0+1,95@@


+/*


+*Copyright(c)2010SamsungElectronicsCo.,Ltd.


+*'target='_blank'>http://www.samsung.com/[/code]
+*


+*Thisprogramisfreesoftware;youcanredistributeitand/ormodify


+*itunderthetermsoftheGNUGeneralPublicLicenseversion2as


+*publishedbytheFreeSoftwareFoundation.


+*/


+


+#include<;stdio.h>


+#include<;string.h>


+#include<;stdlib.h>


+


+intmain(intargc,char*argv[])


+{


+FILE*fp;


+unsignedcharsrc;


+char*Buf,*a;


+intBufLen;


+intnbytes,fileLen;


+unsignedintchecksum=0;


+inti;


+


+if(argc!=4)


+{


+printf("Usage:mkbl1<sourcefile><destinationfile><size>\n");


+return-1;


+}


+


+BufLen=atoi(argv[3]);


+Buf=(char*)malloc(BufLen);


+memset(Buf,0x00,BufLen);


+


+fp=fopen(argv[1],"rb");


+if(fp==NULL)


+{


+printf("sourcefileopenerror\n");


+free(Buf);


+return-1;


+}


+


+fseek(fp,0L,SEEK_END);


+fileLen=ftell(fp);


+fseek(fp,0L,SEEK_SET);


+#if0


+if(BufLen>fileLen)


+{


+printf("Usage:unsupportedsize\n");


+free(Buf);


+fclose(fp);


+return-1;


+}


+#endif


+nbytes=fread(Buf,1,fileLen,fp);


+


+if(nbytes!=fileLen)


+{


+printf("sourcefilereaderror\n");


+free(Buf);


+fclose(fp);


+return-1;


+}


+


+fclose(fp);


+


+for(i=0;i<(14*1024)-4;i++)


+{


+checksum+=(unsignedchar)(Buf[i]);


+}


+*(unsignedint*)(Buf+i)=checksum;


+


+fp=fopen(argv[2],"wb");


+if(fp==NULL)


+{


+printf("destinationfileopenerror\n");


+free(Buf);


+return-1;


+}


+


+a=Buf;


+nbytes=fwrite(a,1,BufLen,fp);


+


+if(nbytes!=BufLen)


+{


+printf("destinationfilewriteerror\n");


+free(Buf);


+fclose(fp);


+return-1;


+}


+


+free(Buf);


+fclose(fp);


+


+return0;


+}

[/code]

2、修改sd_fuse/tiny4412/fast_fuse.sh，用于将BL2和u-boot烧写到SD卡中



[code]diff--gita/sd_fuse/tiny4412/fast_fuse.shb/sd_fuse/tiny4412/fast_fuse.sh


newfilemode100755


index0000000..18a22ca


---/dev/null


+++b/sd_fuse/tiny4412/fast_fuse.sh


@@-0,0+1,90@@


+#


+#Copyright(C)2011SamsungElectronicsCo.,Ltd.


+#'target='_blank'>http://www.samsung.com/[/code]
+#


+#Thisprogramisfreesoftware;youcanredistributeitand/ormodify


+#itunderthetermsoftheGNUGeneralPublicLicenseversion2as


+#publishedbytheFreeSoftwareFoundation.


+#


+####################################


+


+if[-z$1]


+then


+echo"usage:./sd_fusing.sh<SDReader'sdevicefile>"


+exit0


+fi


+


+if[-b$1]


+then


+echo"$1readerisidentified."


+else


+echo"$1isNOTidentified."


+exit0


+fi


+


+####################################


+#<;verifydevice>


+


+BDEV_NAME=`basename$1`


+BDEV_SIZE=`cat/sys/block/${BDEV_NAME}/size`


+


+if[${BDEV_SIZE}-le0];then


+echo"Error:NOmediafoundincardreader."


+exit1


+fi


+


+if[${BDEV_SIZE}-gt32000000];then


+echo"Error:Blockdevicesize(${BDEV_SIZE})istoolarge"


+exit1


+fi


+


+####################################


+#checkfiles


+


+E4412_SPL=../../spl/u-boot-spl.bin


+E4412_UBOOT=../../u-boot-dtb.bin


+MKBL2=../mkbl2


+


+if[!-f${E4412_SPL}];then


+echo"Error:u-boot-spl.binNOTfound,pleasebuildit&tryagain."


+exit-1


+fi


+


+if[!-f${E4412_UBOOT}];then


+echo"Error:u-boot-dtb.binNOTfound,pleasebuildit&tryagain."


+exit-1


+fi


+


+if[!-f${MKBL2}];then


+echo"Error:cannotfindhosttool-mkbl2,stop."


+exit-1


+fi


+


+#<;makebl2>


+${MKBL2}${E4412_SPL}bl2.bin14336


+


+####################################


+#fusingimages


+


+bl2_position=17


+uboot_position=81


+


+#<;BL2fusing>


+echo"---------------------------------------"


+echo"BL2fusing"


+ddiflag=dsyncoflag=dsyncif=./bl2.binof=$1seek=$bl2_position


+


+#<;u-bootfusing>


+echo"---------------------------------------"


+echo"u-bootfusing"


+ddiflag=dsyncoflag=dsyncif=${E4412_UBOOT}of=$1seek=$uboot_position


+


+#<;flushtodisk>


+sync


+


+####################################


+#<;MessageDisplay>


+echo"---------------------------------------"


+echo"U-bootimageisfused(at`date+%T`)successfully."


+echo"EjectSDcardandinsertitagain."


+

[/code]

3、修改sd_fuse/tiny4412/sd_fusing.sh，用于烧写BL1、BL2、u-boot以及tz



[code]diff--gita/sd_fuse/tiny4412/sd_fusing.shb/sd_fuse/tiny4412/sd_fusing.sh


newfilemode100755


index0000000..7c72fc1


---/dev/null


+++b/sd_fuse/tiny4412/sd_fusing.sh


@@-0,0+1,102@@


+#


+#Copyright(C)2011SamsungElectronicsCo.,Ltd.


+#'target='_blank'>http://www.samsung.com/[/code]
+#


+#Thisprogramisfreesoftware;youcanredistributeitand/ormodify


+#itunderthetermsoftheGNUGeneralPublicLicenseversion2as


+#publishedbytheFreeSoftwareFoundation.


+#


+####################################


+


+if[-z$1]


+then


+echo"usage:./sd_fusing.sh<SDReader'sdevicefile>"


+exit0


+fi


+


+if[-b$1]


+then


+echo"$1readerisidentified."


+else


+echo"$1isNOTidentified."


+exit0


+fi


+


+####################################


+#<;verifydevice>


+


+BDEV_NAME=`basename$1`


+BDEV_SIZE=`cat/sys/block/${BDEV_NAME}/size`


+


+if[${BDEV_SIZE}-le0];then


+echo"Error:NOmediafoundincardreader."


+exit1


+fi


+


+if[${BDEV_SIZE}-gt32000000];then


+echo"Error:Blockdevicesize(${BDEV_SIZE})istoolarge"


+exit1


+fi


+


+####################################


+#checkfiles


+


+E4412_SPL=../../spl/u-boot-spl.bin


+E4412_UBOOT=../../u-boot-dtb.bin


+MKBL2=../mkbl2


+


+if[!-f${E4412_SPL}];then


+echo"Error:u-boot-spl.binNOTfound,pleasebuildit&tryagain."


+exit-1


+fi


+


+if[!-f${E4412_UBOOT}];then


+echo"Error:u-boot.binNOTfound,pleasebuildit&tryagain."


+exit-1


+fi


+


+if[!-f${MKBL2}];then


+echo"Error:cannotfindhosttool-mkbl2,stop."


+exit-1


+fi


+


+#<;makebl2>


+${MKBL2}${E4412_SPL}bl2.bin14336


+


+####################################


+#fusingimages


+


+signed_bl1_position=1


+bl2_position=17


+uboot_position=81


+tzsw_position=1105


+


+#<;BL1fusing>


+echo"---------------------------------------"


+echo"BL1fusing"


+ddiflag=dsyncoflag=dsyncif=./E4412_N.bl1.binof=$1seek=$signed_bl1_position


+


+#<;BL2fusing>


+echo"---------------------------------------"


+echo"BL2fusing"


+ddiflag=dsyncoflag=dsyncif=./bl2.binof=$1seek=$bl2_position


+


+#<;u-bootfusing>


+echo"---------------------------------------"


+echo"u-bootfusing"


+ddiflag=dsyncoflag=dsyncif=${E4412_UBOOT}of=$1seek=$uboot_position


+


+#<;TrustZoneS/Wfusing>


+echo"---------------------------------------"


+echo"TrustZoneS/Wfusing"


+ddiflag=dsyncoflag=dsyncif=./E4412_tzsw.binof=$1seek=$tzsw_position


+


+#<;flushtodisk>


+sync


+


+####################################


+#<;MessageDisplay>


+echo"---------------------------------------"


+echo"U-bootimageisfusedsuccessfully."


+echo"EjectSDcardandinsertitagain."


+

[/code]

烧写方法

第一次烧写：./sd_fusing.sh/dev/sdf(假设sd卡被识别为sdf)

以后烧写的时候为了提高速度，可以使用./fast_fuse.sh/dev/sdf

启动

将sd卡插入tiny4412底板上的sd卡插槽，然后设置为从sd卡启动即可。log会从COM0输出，波特率115200，无奇偶校验、一位停止位、8位数据位。

完整的代码我已经上传到github上了

下载和使用方法：

1、gitclonehttps://github.com/pengdonglin137/u-boot-bu-boot-2015-10-tiny4412

2、修改Makefile，将CROSS_COMPILE强制设置为arm-linux-

3、maketiny4412_defconfig&&make

4.cdsd_fuse/tiny4412&&./sd_fusing/dev/sdf