Chapter 2 The ARM Archetecture——Cortex-A Series Programmer's Guide

/* Chapter 1 Introduction 介绍了片上系统SoC和嵌入式系统，都是了解过的一些概念。 */
本章的内容：
1. The programmer must distinguish between behaviors which are specific to the following:
有：Architecture	Micro-architecture	Processor	Core	Individual systems
Architecture架构：一谈架构你就要跟指令集，寄存器，中断处理和编程模型联系在一起

Micro-architecture: 在某种架构下，指令是如何执行的。指流水线的层级

Processor: 实现micro-architecture的组成部分，还有内存，外设，其他设备

Core：指一个多核处理器里的单独的逻辑执行单元

Individual systems：指Soc,如s3c2440，s5pv100之类的

2.

    Key points of the ARM Cortex-A series architecture

32-bit RISC processor, with 16 × 32-bit visible registers with mode-based register banking.

Modified Harvard Architecture (separate, concurrent access to instructions and data)

Load/Store Architecture.

Thumb-2 technology as standard.

VFP and NEON options which are expected to become standard in general purpose applications processor space.

Backward compatibility with code from previous ARM processors

Full 4GB virtual and physical address spaces, with no restrictions imposed by the architecture.

Efficient hardware page table walking for virtual to physical address translation

Virtual Memory for page sizes of 4KB, 64KB, 1MB and 16MB. Cacheability and access permissions can be set on a per-page basis

Big-endian and little-endian support.

Unaligned access support for load/store instructions with 8-,16- and 32-bit integer data sizes.

SMP support on MPCore™ variants, with full data coherency from the L1 cache level.Automatic cache and TLB maintenance propagation provides high efficiency SMP operation.

Physically indexed, physically tagged (PIPT) data caches.