note_20140802_FLOPS_Memory_hierarchy

here is just my own learning note. So thanks so much to the marterials of wiki and Prof. Martin from Boston Univ.

FLOPS

In computing, FLOPS (for FLoating-point Operations Per Second)
is a measure of computer
performance, useful in fields of scientific calculations that make heavy use of floating-point calculations.
For such cases it is a more accurate measure than the generic instructions
per second.

FLOPS=core*clock cycle*(Flops/cycle)

A CPU cache is
a cache used
by the central
processing unit (CPU) of a computer to
reduce the average time to access memory data.
The cache is a smaller, faster memory which stores copies of the data from frequently usedmain
memory locations. Most CPUs have different independent caches, including instruction and data caches, where the data cache is usually organized
as a hierarchy of more cache levels (L1, L2 etc.)

When the processor needs to read from or write to a location in main memory, it first checks whether a copy of that data is in the cache. If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to
main memory.

Most modern desktop and server CPUs have at least three independent caches: an instruction cache to speed up executable instruction fetch, a data cache to speed up data fetch and store, and a translation
lookaside buffer(TLB) used to speed up virtual-to-physical address translation for both executable instructions and data. The data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc.; see Multi-level
caches).

Data is transferred between memory and cache in blocks of fixed size, called cache lines. When a cache line is copied from memory into the cache, a cache entry is created. The cache entry will include the copied data as well as the requested memory
location (now called a tag).

When the processor needs to read or write a location in main memory, it first checks for a corresponding entry in the cache. The cache checks for the contents of the requested memory location in any cache lines that might contain that address. If the processor
finds that the memory location is in the cache, a cache hit has occurred. However, if the processor does not find the memory location in the cache, a cache miss has occurred. In the case of:
a cache hit, the processor immediately reads or writes the data in the cache line
a cache miss, the cache allocates a new entry, and copies in data from main memory; then, the request is fulfilled from the contents of the cache.

MemoryHierarchy ó A
type of memory system design that usesmultiple levels; as the distance from the CPU increases, the size of thememories and the access time also increase.



This is a comparsion between different memory.

Very important Concenpt in memory

Temporal Locality ó 

If an item is referenced, it will tend to be referenced again soon.

 (

Howto take advantage:   Keep most recently accessed data close to the
processor
)

Spatial Locality ó

•If anitem is referenced, items whose addresses are close by will tend to be referenced soon.

•Atany instant, programs access a relatively small part of the address space.

(

How to take advantage:  When data are needed in a higher level ofmemory, move surrounding data as well (blocks)
)



A whole memory hierarchy



CPU generates a memory access request. Then the cache controller intercept the request, check whether the data is in cache.

1. Cache hit: the data is in cache. So the cache is accessed and the data is transfer to the CPU.

2. Cache miss: the is data requested is not in the cache.  Memory is accessed, copy of data and address of data in main memory is sent to the CPU. (The data is transferred from in cache controller is cache line,
including two parts, the tag and data, which tag is to uniquely a block of data, usually is the address of the block. Block is the unit of interaction, which means the trunk of data that gets transferred between the levels of a memory hierarchy.)