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Verilog $Scannf 使用小结

2014-06-05 09:07 369 查看
Here is an example:

parameter IR500_CURRENT = "0b00000000000";
parameter CURRENT_MODE = "0b0";

reg [95:0] IR_CUR;
reg [7:0] CUR_MOD;
reg [20:0] ir_current;
reg cur_mode;
integer i,j;
supply0 GND;
supply1 VCC;

initial
begin
IR_CUR= IR500_CURRENT;
CUR_MOD = CURRENT_MODE;
i=$sscanf(IR_CUR, "%b",ir_current);
j=$sscanf(CUR_MOD, "%b",cur_mode);
end

The IR_CUR can be anything like binary string...

we can change the formate, based on the input parameter, like we can even use :"0b%b".

Here I only wanto get the binary part.

So, the width of IR_CUR should be [(length-2)*8-1:0] =>[95;0];

Onther way :

function [10:1] str2bin_12 (input [(12+2)*8-1:0] binstr);
integer i, j;
reg [1:8] ch;
begin
for (i=12; i>=1; i=i-1)
begin
for (j=1; j<=8; j=j+1)
ch[j] = binstr[i*8-j];
case (ch)
"0" : str2bin_12[i] = 1'b0;
"1" : str2bin_12[i] = 1'b1;
default: str2bin_12[i] = 1'bx;
endcase
end
end
endfunction
wire [11:0] ir_current = str2bin_12(IR500_CURRENT);


 

 

 
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标签:  Verilog