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u-boot2013.10引导linux3.10.30记录

2014-02-22 12:07 218 查看
首先确定real210.h头文件的配置是否正确,我的完整配置如下:

/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* HeungJun Kim <riverful.kim@samsung.com>
* Inki Dae <inki.dae@samsung.com>
*
* Configuation settings for the SAMSUNG SMDKC100 board.
*
* SPDX-License-Identifier: GPL-2.0+
*/

#ifndef __CONFIG_H
#define __CONFIG_H

//#define DEBUG /*调试宏定义*/
//#define CONFIG_SKIP_LOWLEVEL_INIT /*用于调试*/
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* which is in a S5P Family */
#define CONFIG_S5PC100 1 /* which is in a S5PC100 */
#define CONFIG_SMDKC100 1 /* working with SMDKC100 */
#define CONFIG_S5PC11X 1 /* 打开nand_cp功能 */
#include <asm/arch/cpu.h> /* get chip and board defs */

#define CONFIG_ARCH_CPU_INIT

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

/* input clock of PLL: SMDKC100 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000

/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000

/* Text Base */
#define CONFIG_SYS_TEXT_BASE 0x4ff00000 /*原为4ff00000,调试的时候使用3ff00000*/

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING

/*
* Size of malloc() pool
* 1MB = 0x100000, 0x100000 = 1024 * 1024
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
/*
* select serial console configuration
*/
#define CONFIG_SERIAL2 1 /* use SERIAL 2 on REAL210 */

/* PWM */
#define CONFIG_PWM 1

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200

/***********************************************************
* Command definition
***********************************************************/
#include <config_cmd_default.h>

//#define CONFIG_CMD_FLASH /*用户修改*/
#undef CONFIG_CMD_IMLS
//#define CONFIG_CMD_NAND /*用户修改*/

#define CONFIG_CMD_CACHE
#define CONFIG_CMD_REGINFO
//#define CONFIG_CMD_ONENAND
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MTDPARTS
//#define CONFIG_CMD_EXT2 /*用户添加*/

#define CONFIG_BOOTDELAY 3

#define CONFIG_ZERO_BOOTDELAY_CHECK

#define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS //#define CONFIG_ENV_OVERWRITE /*",512k@0x80000(params)"\*/ #define MTDIDS_DEFAULT "nand0=s3c-nand" #define MTDPARTS_DEFAULT "mtdparts=s3c-nand:1m(bootloader)"\ ",5m@0x100000(kernel)"\ ",-(root)" #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT

/*#define CONFIG_BOOTCOMMAND "run ubifsboot"*/

#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \
" console=ttySAC2,115200n8" \
" mem=512M"

#define CONFIG_COMMON_BOOT "console=ttySAC2,115200n8" \
" mem=512M " \
" " MTDPARTS_DEFAULT

/*#define CONFIG_BOOTARGS "root=/dev/mtdblock5 ubi.mtd=4" \
" rootfstype=cramfs " CONFIG_COMMON_BOOT*/

#define CONFIG_UPDATEB "updateb=nand erase 0x0 0x80000;" \
" nand write 0x40008000 0x0 0x80000\0"
#if 0
#define CONFIG_ENV_OVERWRITE
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_UPDATEB \
"updatek=" \
"onenand erase 0x60000 0x300000;" \
"onenand write 0x31008000 0x60000 0x300000\0" \
"updateu=" \
"onenand erase block 147-4095;" \
"onenand write 0x32000000 0x1260000 0x8C0000\0" \
"bootk=" \
"onenand read 0x30007FC0 0x60000 0x300000;" \
"bootm 0x30007FC0\0" \
"flashboot=" \
"set bootargs root=/dev/mtdblock${bootblock} " \
"rootfstype=${rootfstype} " \
"ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT ";" \
"run bootk\0" \
"ubifsboot=" \
"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
" ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT "; " \
"run bootk\0" \
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
"android=" \
"set bootargs root=ubi0!ramdisk ubi.mtd=${ubiblock} " \
"rootfstype=ubifs init=/init.sh " CONFIG_COMMON_BOOT "; " \
"run bootk\0" \
"nfsboot=" \
"set bootargs root=/dev/nfs ubi.mtd=${ubiblock} " \
"nfsroot=${nfsroot},nolock " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
"${netmask}:nowplus:usb0:off " CONFIG_COMMON_BOOT "; " \
"run bootk\0" \
"ramboot=" \
"set bootargs " CONFIG_RAMDISK_BOOT \
" initrd=0x33000000,8M ramdisk=8192\0" \
"rootfstype=cramfs\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"meminfo=mem=512M\0" \
"nfsroot=/nfsroot/arm\0" \
"bootblock=5\0" \
"ubiblock=4\0" \
"ubi=enabled"
#endif
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "REAL210 # "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5e00000)
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE

#define CONFIG_SYS_HZ 1000

/* SMDKC100 has 2 banks of DRAM */
#define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */
#define SDRAM_BANK_SIZE 0x10000000 /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE

#define CONFIG_SYS_MONITOR_BASE 0x00000000

/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CONFIG_SYS_NO_FLASH 1

#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
#define CONFIG_IDENT_STRING " for REAL210"

#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
#define CONFIG_ENABLE_MMU
#endif

#ifdef CONFIG_ENABLE_MMU
#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
#else
#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
#endif

/*-----------------------------------------------------------------------
* Boot configuration
*/
#if 0
//#define CONFIG_ENV_IS_IN_ONENAND 1
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_ENV_SIZE (128 << 10) /* 128KiB, 0x20000 */
#define CONFIG_ENV_ADDR (256 << 10) /* 256KiB, 0x40000 */
#define CONFIG_ENV_OFFSET (256 << 10) /* 256KiB, 0x40000 */

#define CONFIG_USE_ONENAND_BOARD_INIT
#define CONFIG_SAMSUNG_ONENAND 1
#define CONFIG_SYS_ONENAND_BASE 0xE7100000
#endif

#define CONFIG_ENV_IS_IN_NAND 1 /* 打开该宏,环境变量会保存在nand,同时CONFIG_ENV_IS_IN_MMC和CONFIG_SYS_MMC_ENV_DEV需要注释掉*/
//#define CONFIG_ENV_IS_IN_MMC 1 /* 打开该宏,环境变量会保存在mmc,同时CONFIG_SYS_MMC_ENV_DEV需要打开并注释掉CONFIG_ENV_IS_IN_NAND*/
//#define CONFIG_SYS_MMC_ENV_DEV 0

#define CONFIG_CMD_SAVEENV /* 开启环境变量操作命令*/
#define CONFIG_ENV_SIZE 0x40000 /* 环境变量的大小 */
#define CONFIG_ENV_ADDR 0 /* 该定义不清楚什么作用,测试结果它的值没有影响环境变量的存储地址 */
#define CONFIG_ENV_OFFSET 0x80000 /* 环境变量nand相对基址的偏移量,u-boot的大小一般在500KB以内,所以环境变量设置在512KB到1MB之间即可 */

#define CONFIG_DOS_PARTITION 1

//#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR + 0x10000000)
/*
* Ethernet Contoller driver
*/
#if 0
#define CONFIG_CMD_NET

#ifdef CONFIG_CMD_NET
#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */
#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */
#define CONFIG_SMC911X_BASE 0x88000300 /* SMC911X Drive Base */
#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
#endif /* CONFIG_CMD_NET */
#endif
/*下面为添加部分*/
#define PRINTF_LOGO /*打开该宏可以打印logo,位置在板级目录real210.c*/

#define CONFIG_MCP_SINGLE 1 /*初始化内存使用*/
#define CONFIG_EVT1 1 /* EVT1 */
#define CONFIG_BL1_CHECKSUM 1 /* 在往nand中写入u-boot时,前8K需要有校验和,因为在bl0阶段会对它进行校验,由该宏控制,代码在nand_base.c的nand_write中 */

#define CONFIG_UBOOT_BASE CONFIG_SYS_TEXT_BASE /*0x4ff00000*/
#define CONFIG_PHY_UBOOT_BASE CONFIG_SYS_TEXT_BASE /*CONFIG_SYS_SDRAM_BASE + 0x3e00000*/

#define BOOT_ONENAND 0x1
#define BOOT_NAND 0x2
#define BOOT_MMCSD 0x3
#define BOOT_NOR 0x4
#define BOOT_SEC_DEV 0x5

#undef CONFIG_MEMORY_UPPER_CODE

#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* total memory required by uboot */
#define CONFIG_UBOOT_SIZE (1*1024*1024) /* Uboot的大小设置为1MB,1MB空间还包含环境变量*/
/*时钟部分*/
/* CLK_DIV0 */
#define APLL_RATIO 0
#define A2M_RATIO 4
#define HCLK_MSYS_RATIO 8
#define PCLK_MSYS_RATIO 12
#define HCLK_DSYS_RATIO 16
#define PCLK_DSYS_RATIO 20
#define HCLK_PSYS_RATIO 24
#define PCLK_PSYS_RATIO 28

#define APLL_MDIV 0x7d
#define APLL_PDIV 0x3
#define APLL_SDIV 0x1

#define MPLL_MDIV 0x29b
#define MPLL_PDIV 0xc
#define MPLL_SDIV 0x1

#define EPLL_MDIV 0x60
#define EPLL_PDIV 0x6
#define EPLL_SDIV 0x2

#define VPLL_MDIV 0x6c
#define VPLL_PDIV 0x6
#define VPLL_SDIV 0x3

#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv)

#define APLL_VAL set_pll(APLL_MDIV,APLL_PDIV,APLL_SDIV)
#define MPLL_VAL set_pll(MPLL_MDIV,MPLL_PDIV,MPLL_SDIV)
#define EPLL_VAL set_pll(EPLL_MDIV,EPLL_PDIV,EPLL_SDIV)
#define VPLL_VAL set_pll(VPLL_MDIV,VPLL_PDIV,VPLL_SDIV)

#define APLL_LOCKTIME_VAL 0x2cf
#define CLK_DIV0_MASK 0x7fffffff
#define CLK_DIV0_VAL ((0<<APLL_RATIO)|(4<<A2M_RATIO)|(4<<HCLK_MSYS_RATIO)|(1<<PCLK_MSYS_RATIO)\
|(3<<HCLK_DSYS_RATIO)|(1<<PCLK_DSYS_RATIO)|(4<<HCLK_PSYS_RATIO)|(1<<PCLK_PSYS_RATIO))
#if defined(CONFIG_EVT1)
/* Set AFC value */
#define AFC_ON 0x00000000
#define AFC_OFF 0x10000010
#endif
/*串口部分*/
#define UART_UBRDIV_VAL 34
#define UART_UDIVSLOT_VAL 0xDDDD

/*下面是用户添加的对内存配置的定义*/
#define DMC0_MEMCONTROL 0x00202400
#define DMC0_MEMCONFIG_0 0x30F01323 // MemConfig0 256MB config, 8 banks,Mapping Method[12:15]0:linear, 1:linterleaved, 2:Mixed
#define DMC0_MEMCONFIG_1 0x40F01323 // MemConfig1
#define DMC0_TIMINGA_REF 0x00000618 // TimingAref 7.8us*133MHz=1038(0x40E), 100MHz=780(0x30C), 20MHz=156(0x9C), 10MHz=78(0x4E)
#define DMC0_TIMING_ROW 0x28233287 // TimingRow for @200MHz
#define DMC0_TIMING_DATA 0x23240304 // TimingData CL=3
#define DMC0_TIMING_PWR 0x09C80232 // TimingPower

#define DMC1_MEMCONTROL 0x00202400 // MemControl BL=4, 2 chip, DDR2 type, dynamic self refresh, force precharge, dynamic power down off
#define DMC1_MEMCONFIG_0 0x40F01323 // MemConfig0 512MB config, 8 banks,Mapping Method[12:15]0:linear, 1:linterleaved, 2:Mixed
#define DMC1_MEMCONFIG_1 0x40E01323 // MemConfig1 在real210中该寄存器配置与否都行,因为本硬件不使用该部分功能
#define DMC1_TIMINGA_REF 0x00000618 // TimingAref 7.8us*133MHz=1038(0x40E), 100MHz=780(0x30C), 20MHz=156(0x9C), 10MHz=78(0x4
#define DMC1_TIMING_ROW 0x28233289 // TimingRow for @200MHz
#define DMC1_TIMING_DATA 0x23240304 // TimingData CL=3
#define DMC1_TIMING_PWR 0x08280232 // TimingPower

/*
* Ethernet Contoller driver 网络配置
*/

#define CONFIG_DM9000
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE (0x88000300)
#define CONFIG_DM9000_USE_16BIT
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE+0x4)
#define DM9000_16BIT_DATA

#define CONFIG_CMD_PING

//#define CONFIG_BOOTARGS "console=ttySAC2,115200 noinitrd root=/dev/mtdblock2 init=/linuxrc"
#define CONFIG_ETHADDR 00:22:12:34:56:90
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.1.20
#define CONFIG_SERVERIP 192.168.1.22
#define CONFIG_GATEWAYIP 192.168.1.1

/*auto complete command*/
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE /*实现命令补全功能*/
#define CONFIG_SYS_HUSH_PARSER

/*nand driver*/
/* nand copy size from nand to DRAM.*/
#define COPY_BL2_SIZE 0x80000

#define CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE 0xB0E00000
#define CONFIG_NAND_S5PV210

#define NAND_DISABLE_CE() (NFCONT_REG |= (1 << 1))
#define NAND_ENABLE_CE() (NFCONT_REG &= ~(1 << 1))

#define CONFIG_S5PC11X_NAND_HWECC/*开启硬件ecc校验*/
#define CONFIG_NAND_BL1_8BIT_ECC/*使用8位ecc硬件校验*/
//#define CONFIG_SYS_NAND_ONFI_DETECTION /*检测ONFI*/
//#define CONFIG_MTD_NAND_VERIFY_WRITE/*nand写入数据校验*/
//#define CONFIG_MTD_DEBUG/*调试mtd*/
//#define CONFIG_MTD_DEBUG_VERBOSE 3

/*SD driver*/
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define CONFIG_CMD_MMC

#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT

//#define CONFIG_BOOTCOMMAND "nand read 30008000 100000 400000; bootm 30008000"
#define CONFIG_BOOTCOMMAND "tftp 30008000 /210_old/uImage;bootm 30008000"
#define CONFIG_BOOTARGS     "console=ttySAC2,115200 noinitrd root=/dev/mtdblock2 init=/linuxrc" 

#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV210 /* 值是2456 */
#define CONFIG_MTD_NAND_YAFFS2   1
//#define CONFIG_GZIP
//#define CONFIG_SILENT_CONSOLE
#endif /* __CONF

配置里面涉及的重要配置如下:
/* input clock of PLL: SMDKC100 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000

/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000

/* Text Base */
#define CONFIG_SYS_TEXT_BASE 0x4ff00000 /*原为4ff00000,调试的时候使用3ff00000*/

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS

//#define CONFIG_ENV_OVERWRITE
/*",512k@0x80000(params)"\*/
#define MTDIDS_DEFAULT		"nand0=s3c-nand"
#define MTDPARTS_DEFAULT	"mtdparts=s3c-nand:1m(bootloader)"\
",5m@0x100000(kernel)"\
",-(root)"

#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT

#define CONFIG_BOOTCOMMAND	"tftp 30008000 /210_old/uImage;bootm 30008000"
#define CONFIG_BOOTARGS    	"console=ttySAC2,115200 noinitrd root=/dev/mtdblock2 init=/linuxrc"

#define CONFIG_MACH_TYPE	MACH_TYPE_SMDKV210 /* 值是2456 */
#define CONFIG_MTD_NAND_YAFFS2   1


另外还需要修改两个文件,一个是common/cmd_bootm.c,用gedit打开该文件搜索images.ep = image_get_ep(&images.legacy_hdr_os_copy),然后再后面增加+0x40,也就是修改成images.ep = image_get_ep(&images.legacy_hdr_os_copy)+0x40,增加+0x40的原因是uImage头是64个字节也就是0x40,真正的启动地址是在uImage的基地址加上0x40的偏移量,如果不设置这个,linux是无法引导的。当然如果使用zImage的话就不需要了,但是还得删除u-boot检查uImage头的功能才行,这个后边再做记录。
另一个要修改的就是板级文件了,得确定传递到内核的机器码是否与内核的一致。查询机器码我就不记录了,百度一下即可。内核的机器码被设置为SMDKV210的,也就是0x998,那么在u-boot中查找SMDKV210的机器码位置在/arch/arm/include/asm/mach-types.h中定义。打开real210.c搜索gd->bd->bi_arch_number,修改成gd->bd->bi_arch_number = CONFIG_MACH_TYPE;,CONFIG_MACH_TYPE定义在real210.h文件中,被定义成MACH_TYPE_SMDKV210,这样就可以使机器码匹配了。

编译下载。

关于内核的配置,请参考http://blog.csdn.net/wang_shuai_ww/article/details/19640009
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