第一次移植uboot(1) .

第一次移植uboot,因此把移植步骤记录下来:

/*2010.11.17--2010.11.18*/

/*u-boot-1.1.4中smdk2410到fl2440(s3c2440)移植*/

交叉编绎工具:cross-3.3.2.tar.bz2

默认当前目录为:u-boot-1.1.4

要修改的文件:(1)examples/Makefile (2)Makefile (3)board/fl2440

(4)board/fl2440/fl2440.c (5)board/fl2440/Makefile

(6)include/configs/fl2440.h (7)cpu/arm920t/start.S

(8)include/configs/fl2440.h (8)include/s3c24x0.h

(9)include/s3c2440.h (10)cpu/arm920t/s3c24x0/interrupts.c

(11)cpu/arm920t/s3c24x0/speed.c (12)cpu/arm920t/s3c24x0/serial.c

(13)board/fl2440/fl2440.c (14)cpu/arm920t/s3c24x0/speed.c

(15)include/s3c24x0.h

1. 修改examples/Makefile

126 %.srec:% -> %.srec:%.o

129 %.bin:% -> %.bin:%.o

不修改的话smdk2410编绎不通过

2. Makefile下依照smdk2410_config添加:

fl2440_config :

@./mkconfig $(@:_config=) arm arm920t fl2440 NULL s3c24x0

3. cp -r board/smdk2410
board/fl2440

4. mv board/fl2440/smdk2410.c board/fl2440/fl2440.c

5. 修改board/fl2440/Makefile第28行:

OBJS := smdk2410.o flash.o -> OBJS := fl2440.o flash.o

6. cp include/configs/smdk2410.h include/configs/fl2440.h

到此fl2440可以编译通过

7. 修改cpu/arm920t/start.S

<1>128行(# define CLKDIVN 0x4C000014)后加:

[cpp]
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/*129*/#elif defined(CONFIG_S3C2440)
# define pWTCON 0x53000000

# define INTMSK 0x4A000008

# define INTSUBMSK 0x4A00001C

# define CLKDIVN 0x4C000014

# define NFCONF 0x4E000000

# define NFCONT 0x4E000004

# define NFCMD 0x4E000008

# define NFADDR 0x4E00000C

# define NFDATA 0x4E000010

# define NFSTAT 0x4E000020

/*140*/# define NF_SECTOR_SIZE 2048

[cpp]
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/*159*/# if defined(CONFIG_S3C2440)
ldr     r1, =0x7ff
ldr     r0, =INTSUBMSK
str     r1, [r0]
/*163*/# endif

/*159*/# if defined(CONFIG_S3C2440)
ldr     r1, =0x7ff
ldr     r0, =INTSUBMSK
str     r1, [r0]
/*163*/# endif

<4>169行(str r1, [r0])后加:

[cpp]
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/*170*/# if defined(CONFIG_S3C2440)
ldr r0, =CLKDIVN
mov r1, #5
str r1, [r0]
/*174*/#endif

[cpp]
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/*197*/#if defined(CONFIG_S3C2440)
mov     r7, r0
ldr     r3, =NFCONF
mov     r4, #0x300
str     r4, [r3]                /*NFCONF =0x300 */
ldr     r3, =NFCONT
mov     r4, #0x11
str     r4, [r3]                /*NFCONT = (1<<4)|(0<<1)|(1<<0)*/
ldr     r3, =NFCMD
mov     r4, #0xff
str     r4, [r3]                /*reset nand flash:NFCMD = 0xff*/
wait1:
ldr     r5, =NFSTAT
ldr     r4, [r5]
tst     r4, #1
beq     wait1
copy_loop:
/*read nand flash*/
ldr     r3, =NFCMD
mov     r4, #0x00
str     r4, [r3]                /*write_cmd(0x00)*/

ldr     r5, =NFADDR             /*write addr r0*/
and     r4, r0, #0xff
str     r4, [r5]
mov     r4, r0, lsr#8
and     r4, r4, #0x0f
str     r4, [r5]
mov     r4, r0, lsr#12
and     r4, r4, #0xff
str     r4, [r5]
mov     r4, r0, lsr#20
and     r4, r4, #0xff
str     r4, [r5]
mov     r4, r0, lsr#28
and     r4, r4, #0x01
str     r4, [r5]

mov     r4, #0x30
str     r4, [r3]                /*write_cmd(0x30)*/

ldr     r3, =NFSTAT             /*wait_idle()*/
wait0:
ldr     r4, [r3]
tst     r4, #1
beq     wait0

/*start read data*/
ldr     r3, =NF_SECTOR_SIZE
mov     r4, #0
ldr     r5, =NFDATA
copy1sector:
ldr     r6, [r5]
str     r6, [r1]
add     r0, r0, #4
add     r1, r1, #4
add     r4, r4, #4
add     r7, r7, #4
cmp     r4, r3
bcc     copy1sector
add     r0, r0, #2048
cmp     r7, r2
ble     copy_loop
ldr     r0, =NFCONT
ldr     r1, [r0]
orr     r1, r1, #0x2
str     r1, [r0]
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)

copy_loop:
ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
cmp     r0, r2                  /* until source end addreee [r2]    */
ble     copy_loop
/*270*/#endif/*CONFIG_S3C2440*/

/*197*/#if defined(CONFIG_S3C2440)
mov     r7, r0
ldr     r3, =NFCONF
mov     r4, #0x300
str     r4, [r3]                /*NFCONF =0x300 */
ldr     r3, =NFCONT
mov     r4, #0x11
str     r4, [r3]                /*NFCONT = (1<<4)|(0<<1)|(1<<0)*/
ldr     r3, =NFCMD
mov     r4, #0xff
str     r4, [r3]                /*reset nand flash:NFCMD = 0xff*/
wait1:
ldr     r5, =NFSTAT
ldr     r4, [r5]
tst     r4, #1
beq     wait1
copy_loop:
/*read nand flash*/
ldr     r3, =NFCMD
mov     r4, #0x00
str     r4, [r3]                /*write_cmd(0x00)*/

ldr     r5, =NFADDR             /*write addr r0*/
and     r4, r0, #0xff
str     r4, [r5]
mov     r4, r0, lsr#8
and     r4, r4, #0x0f
str     r4, [r5]
mov     r4, r0, lsr#12
and     r4, r4, #0xff
str     r4, [r5]
mov     r4, r0, lsr#20
and     r4, r4, #0xff
str     r4, [r5]
mov     r4, r0, lsr#28
and     r4, r4, #0x01
str     r4, [r5]

mov     r4, #0x30
str     r4, [r3]                /*write_cmd(0x30)*/

ldr     r3, =NFSTAT             /*wait_idle()*/
wait0:
ldr     r4, [r3]
tst     r4, #1
beq     wait0

/*start read data*/
ldr     r3, =NF_SECTOR_SIZE
mov     r4, #0
ldr     r5, =NFDATA
copy1sector:
ldr     r6, [r5]
str     r6, [r1]
add     r0, r0, #4
add     r1, r1, #4
add     r4, r4, #4
add     r7, r7, #4
cmp     r4, r3
bcc     copy1sector
add     r0, r0, #2048
cmp     r7, r2
ble     copy_loop
ldr     r0, =NFCONT
ldr     r1, [r0]
orr     r1, r1, #0x2
str     r1, [r0]
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
copy_loop:
ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
cmp     r0, r2                  /* until source end addreee [r2]    */
ble     copy_loop
/*270*/#endif/*CONFIG_S3C2440*/

start.S修改完

8. 修改include/configs/fl2440.h

<1>37行#define CONFIG_S3C2410 1

改为:#define CONFIG_S3C2440 1

此时编译fl2440,报错board_init函数中S3C24X0_GPIO未定义

9. 修改include/s3c24x0.h

453行(#endif)后加:

[cpp]
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#ifdef CONFIG_S3C2440
S3C24X0_REG32 GPACON;
S3C24X0_REG32 GPADAT;
S3C24X0_REG32 res1[2];
S3C24X0_REG32 GPBCON;
S3C24X0_REG32 GPBDAT;
S3C24X0_REG32 GPBUP;
S3C24X0_REG32 res2;
S3C24X0_REG32 GPCCON;
S3C24X0_REG32 GPCDAT;
S3C24X0_REG32 GPCUP;
S3C24X0_REG32 res3;
S3C24X0_REG32 GPDCON;
S3C24X0_REG32 GPDDA1T;
S3C24X0_REG32 GPDUP;
S3C24X0_REG32 res4;
S3C24X0_REG32 GPECON;
S3C24X0_REG32 GPEDAT;
S3C24X0_REG32 GPEUP;
S3C24X0_REG32 res5;
S3C24X0_REG32 GPFCON;
S3C24X0_REG32 GPFDAT;
S3C24X0_REG32 GPFUP;
S3C24X0_REG32 res6;
S3C24X0_REG32 GPGCON;
S3C24X0_REG32 GPGDAT;
S3C24X0_REG32 GPGUP;
S3C24X0_REG32 res7;
S3C24X0_REG32 GPHCON;
S3C24X0_REG32 GPHDAT;
S3C24X0_REG32 GPHUP;
S3C24X0_REG32 res8;

S3C24X0_REG32 MISCCR;
S3C24X0_REG32 DCLKCON;
S3C24X0_REG32 EXTINT0;
S3C24X0_REG32 EXTINT1;
S3C24X0_REG32 EXTINT2;
S3C24X0_REG32 EINTFLT0;
S3C24X0_REG32 EINTFLT1;
S3C24X0_REG32 EINTFLT2;
S3C24X0_REG32 EINTFLT3;
S3C24X0_REG32 EINTMASK;
S3C24X0_REG32 EINTPEND;
S3C24X0_REG32 GSTATUS0;
S3C24X0_REG32 GSTATUS1;
S3C24X0_REG32 GSTATUS2;
S3C24X0_REG32 GSTATUS3;
S3C24X0_REG32 GSTATUS4;

S3C24X0_REG32 res9[3];
S3C24X0_REG32 MSLCON;
S3C24X0_REG32 GPJCON;
S3C24X0_REG32 GPJDAT;
S3C24X0_REG32 GPJUP;
#endif

[cpp]
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#if defined(CONFIG_S3C2440)

return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s));
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)

return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
#endif

#if defined(CONFIG_S3C2440)
return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s));
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
#endif

<2>90行(return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK

());)改为:

[cpp]
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#if defined(CONFIG_S3C2440)

#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1)

#define S3C2440_CLKDIVN_HDIVN_1 (0<<1)

#define S3C2440_CLKDIVN_HDIVN_2 (1<<1)

#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1)

#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1)

#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9)

#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8)

unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;

clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;

switch(clkdiv & S3C2440_CLKDIVN_HDIVN_MASK)
{
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
default:
break;
}
return get_FCLK() / hdiv;
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)

return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
#endif

#if defined(CONFIG_S3C2440)
#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1)
#define S3C2440_CLKDIVN_HDIVN_1 (0<<1)
#define S3C2440_CLKDIVN_HDIVN_2 (1<<1)
#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1)
#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1)
#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9)
#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8)

unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;

clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;

switch(clkdiv & S3C2440_CLKDIVN_HDIVN_MASK)
{
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
default:
break;
}
return get_FCLK() / hdiv;
#elif defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
#endif

15. 修改include/s3c24x0.h中S3C24X0_CLOCK_POWER结构体为:

typedef struct {

S3C24X0_REG32 LOCKTIME;

S3C24X0_REG32 MPLLCON;

S3C24X0_REG32 UPLLCON;

S3C24X0_REG32 CLKCON;

S3C24X0_REG32 CLKSLOW;

S3C24X0_REG32 CLKDIVN;

#ifdef CONFIG_S3C2440

S3C24X0_REG32 CAMDIVN;

#endif

} /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;

此时编译运行uboot,串口即可正常输出并显示!

(修改include/configs/fl2440.h中宏#define CFG_PROMPT "SMDK2410 # "为

#define CFG_PROMPT "FL2440 # ")