Denali DDR 在PL301应用下是否需要多个AXI port
2010-07-05 17:36
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question by Michael
Denali DDR2 IP has it’s own arbiter for multi-port AXI bus. ARM bus matrix (PL301) also has it’s arbiter. AXI protocol support reorder and AXI slave can have read/ write acceptance great than 1.
Is there any performance advantage when using multi-port AXI configuration instead of single port AXI which support AXI reorder? ( our system adopt PL301)
Answer from Denali
For a multiport controller, we will have an arbiter. The use of multiport AXI is usually for customer to hookup latency sensitive masters to be directly to the controller instead of going through the bus fabric that may result in larger latency. If there is no such requirement, you may opt for single AXI port. Secondly, having multiple ports, it gives you more room for reordering. Write commands from different ports can be reorder if there are no write collision. For single port, all write commands coming in are process in order to ensure coherency.
Denali DDR2 IP has it’s own arbiter for multi-port AXI bus. ARM bus matrix (PL301) also has it’s arbiter. AXI protocol support reorder and AXI slave can have read/ write acceptance great than 1.
Is there any performance advantage when using multi-port AXI configuration instead of single port AXI which support AXI reorder? ( our system adopt PL301)
Answer from Denali
For a multiport controller, we will have an arbiter. The use of multiport AXI is usually for customer to hookup latency sensitive masters to be directly to the controller instead of going through the bus fabric that may result in larger latency. If there is no such requirement, you may opt for single AXI port. Secondly, having multiple ports, it gives you more room for reordering. Write commands from different ports can be reorder if there are no write collision. For single port, all write commands coming in are process in order to ensure coherency.
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