关于冯诺依曼结构与哈佛结构的探讨1

　　关于冯诺依曼结构与哈佛结构的探讨

　　我们先来看一下维基百科上关于这两个结构的历史介绍

　　http://en.wikipedia.org/wiki/Harvard_Mark_I Harvard Mark I Harvard Mark I是Howard Hathaway Aiken在IBM开发的计算机原来叫做顺序控制的自动计算器Automatic Sequence Controlled Calculator (ASCC)

　　在1944年02月送给哈佛大学被命名为Mark I(Mark一代)

　　The Mark I read its instructions fROM a 24 channel punched paper tape and executed the current instruction and then read in the next one. It had no conditional branch instruction. This meant that complex programs had to be physically long. A loop was accomplished by joining the end of the paper tape containing the program back to the beginning of the tape (literally creating a loop). This

　　separation of data and instructions is known as the Harvard architecture (although the exact nature of this separation that makes a machine Harvard, rather than Von Neumann, has been obscured with the passage of time, see Modified Harvard architecture).

　　Mark I从它的24通道的带孔纸带中读取指令，运行当前的指令然后再读取下一条。它没有条件转义指令。这意味着复杂的程序的就会很长。这个循环是通过把纸带的末尾和包含要返回的纸带开始的部分连接在一起来实现的(做了一个真正的圈)。这种指令和数据的分离被称为哈佛架构(虽然这种确切区分哈佛机与冯诺依曼机的本质随着时间的推移已经变得模糊。)

　　http://en.wikipedia.org/wiki/Harvard_architecture

　　哈佛架构(对于architecture这个单词我更喜欢翻译成架构呵呵)

　　Harvard architecture

　　The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data.The term originated fROM the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters. These early machines had limited data storage, entirely contained within the central processing unit,and provided no access to the instruction storage as data, making loading and modifying programs an entirely offline process.Today, most processors implement such separate signal pathways for performance reasons but actually implement a Modified Harvard architecture, so they can support tasks like loading a program fROM disk storage as data and then executing it.

　　哈佛架构一种拥有物理独立的指令和数据存储单元和不同信号通路的计算机架构。这个术语源于基于继电器的哈佛Mark一代(Harvard Mark I)计算机，这台计算机在带孔的纸袋上存储指令（24位宽）在电机械计数器上存储数据。这种早期的机器有有限的数据存储空间，这些空间全部都在中央处理单元的内部(CPU),而且不提供把指令存储空间当作数据访问的功能，加载和修改程序是完全的脱机操作。现在，多数的处理器为了提升性能采用这种独立的信号通路，但是实际上是实现了一种改进的哈佛架构，因为他们能够支持这种像从磁盘存储像加载数据中加载一段程序并运行它的这种任务。

　　In a Harvard architecture, there is no need to make the two memories share characteristics. In particular, the word width, timing, implementation technology, and memory address structure can differ. In some systems, instructions can be stored in read-only memory while data memory generally requires read-write memory. In some systems, there is much more instruction memory than data memory so instruction addresses are wider than data addresses.

　　在哈佛架构中的两种存储器没有必要有同样的一些参数。尤其在字长、时序、实现技术，存储地址结构等方面都可以不同。在一些系统中，指令可以存储在只读存储器中而数据存储则需要可读科协存储器。在一些系统中，指令存储器比数据存储器更大，所以指令地址的宽度要高达数据地址。

　　Contrast with von Neumann architectures

　　与冯诺依曼架构的对比

　　In a computer with the contrasting von Neumann architecture (and no CPU cache), the CPU can be either reading an instruction or reading/writing data fROM/to the memory. Both cannot occur at the same time since the instructions and data use the same bus system. In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache.

　　在基于冯诺依曼架构的计算机中(没有CPU缓存)，CPU或者从存储器中读取指令或数据，或者在存储器中写入数据。但是它们不同够同时发生，因为指令和数据都使用相同的总线系统。在使用哈佛架构的计算机中，即使没有缓存，CPU也可以在读取指令的同时进行数据访问。

　　Also, a Harvard architecture machine has distinct code and data address spaces: instruction address zero is not the same as data address zero. Instruction address zero might identify a twenty-four bit value, while data address zero might indicate an eight bit byte that isn't part of that twenty-four bit value.

　　同时，哈佛架构机拥有不同的代码和数据地址空间: 指令的零地址和数据的零地址不是一回事。指令的零地址可能是一个24位的值，而数据的零地址可能是一个8位的字节，并且这个字节也不是那个24位值的一部分。

　　Contrast with Modified Harvard architecture

　　与改进的哈佛架构的对比

　　A Modified Harvard architecture machine is very much like a Harvard architecture machine, but it relaxes the strict separation between instruction and data while still letting the CPU concurrently access two (or more) memory busses.

　　改进的哈佛架构机更像哈佛架构机，但是它在CPU能够并发访问两个(或多个)存储总线的前提下放宽了对指令和数据存储的严格独立的要求

　　The most common modification includes separate instruction and data caches backed by a common address space. While the CPU executes fROM cache, it acts as a pure Harvard machine. When accessing backing memory, it acts like a von Neumann machine (where code can be moved around like data, a powerful technique). This modification is widespread in modern processors such as the ARM architecture and X86 processors. It is sometimes loosely called a Harvard architecture, overlooking the fact that it is actually "modified".

　　最常见的一种改进是用一个公共的地址空间来备份指令和数据缓冲。CPU从缓冲中运行，它像一个纯粹的哈佛机那样工作。当访问后备存储器时它像个诺依曼机一样工作(程序可以像数据一样移动，一个强大的技术)。这种改进在现代的处理器中广泛传播，比如ARM架构和X85处理器。这种架构通常也不准确的叫做哈佛架构，但仔细看看它事实上被"改进了"。

　　Another modification provides a pathway between the instruction memory (such as ROM or flash) and the CPU to allow words fROM the instruction memory to be treated as read-only data. This technique is used in some microcontrollers, including the Atmel AVR. This allows constant data, such as text strings or function tables, to be accessed without first having to be copied into data memory, preserving scarce (and power-hungry) data memory for read/write variables. Special machine language instructions are provided to read data fROM the instruction memory. (This is distinct fROM instructions which themselves embed constant data, although for individual constants the two mechanisms can substitute for each other.)

　　另一种改进加了一条从指令存储器(比如ROM或者FLASH)到CPU之间的路径，这条路径允许指令存储器可以看做是只读数据。这个技术被用在一些微控制器中，包括Atmel的AVR。这使得常量数据比如字符串常量或者函数表，它们存在指令寄存器中并且不用复制到数据存储器就可以访问到。(这与指令本身就包含常量数据不同，虽然对于单独的常量，这两种方法可以换用)存储器结构

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