DM814X A8核sysbios下不能访问外设地址（MMU的配置）

调试环境：CCS5.5 DM8127 SYS/BIOS
刚开始接触TI 的多核异构处理器， A8 下跑SYS/BIOS实时操作系统，发现无法访问外设，最后发现是要通过SYS/BIOS 来配置MMU ，就是手动的在.cfg文件下添加一段配置代码如下：

var Mmu = xdc.us
4000
eModule('ti.sysbios.family.arm.a8.Mmu');
Mmu.enableMMU = true;

/* MAP CM_PER Register Space in MMU */
/* Force peripheral section to be NON cacheable */
var peripheralAttrs = {
type : Mmu.FirstLevelDesc_SECTION, /* SECTION descriptor */
bufferable : false,
cacheable : false,
shareable : false,
noexecute : true,
};

/* Define the base addresses in which the peripherals reside. */
/* Clock Module, GPIO0, UART0, I2C0 */
var peripheral0BaseAddr = 0x44E00000
/* GPIO1, UART1, UART2, I2C1, McSPI0, McASP0 CFG, McASP1 CFG */
var peripheral1BaseAddr = 0x48000000
/* GPIO2, GPIO3, UART3, UART4, UART5, I2C2, McSPI1 */
var peripheral2BaseAddr = 0x48100000

/* Configure the corresponding MMU page descriptor */
Mmu.setFirstLevelDescMeta(peripheral0BaseAddr, peripheral0BaseAddr, peripheralAttrs);
Mmu.setFirstLevelDescMeta(peripheral1BaseAddr, peripheral1BaseAddr, peripheralAttrs);
Mmu.setFirstLevelDescMeta(peripheral2BaseAddr, peripheral2BaseAddr, peripheralAttrs);需要注意的是 这段地址要配置为

bufferable : false,
cacheable  : false,
shareable  : false,

属性。
然后外设的基地址在 var peripheral0BaseAddr = 0x44E00000 处指定，最后通过 Mmu.setFirstLevelDescMeta 进行写入配置